--- linux-2.6.9-rc3/arch/arm/mach-s3c2410/gpio.c	2004-10-01 17:00:30.000000000 +0100
+++ linux-2.6.9-rc3-work2/arch/arm/mach-s3c2410/gpio.c	2004-10-01 17:41:02.000000000 +0100
@@ -24,6 +24,9 @@
  *	14-Sep-2004  BJD  Added getpin call
  *	14-Sep-2004  BJD  Fixed bug in setpin() call
  *	30-Sep-2004  BJD  Fixed cfgpin() mask bug
+ *	01-Oct-2004  BJD  Added getcfg() to get pin configuration
+ *	01-Oct-2004  BJD  Fixed mask bug in pullup() call
+ *	01-Oct-2004  BJD  Added getoirq() to turn pin into irqno
  */
 
 
@@ -62,6 +65,20 @@
 	local_irq_restore(flags);
 }
 
+unsigned int s3c2410_gpio_getcfg(unsigned int pin)
+{
+	unsigned long base = S3C2410_GPIO_BASE(pin);
+	unsigned long mask;
+
+	if (pin < S3C2410_GPIO_BANKB) {
+		mask = 1 << S3C2410_GPIO_OFFSET(pin);
+	} else {
+		mask = 3 << S3C2410_GPIO_OFFSET(pin)*2;
+	}
+
+	return __raw_readl(base) & mask;
+}
+
 void s3c2410_gpio_pullup(unsigned int pin, unsigned int to)
 {
 	unsigned long base = S3C2410_GPIO_BASE(pin);
@@ -75,7 +92,7 @@
 	local_irq_save(flags);
 
 	up = __raw_readl(base + 0x08);
-	up &= 1 << offs;
+	up &= ~(1L << offs);
 	up |= to << offs;
 	__raw_writel(up, base + 0x08);
 
@@ -121,3 +138,20 @@
 
 	return misccr;
 }
+
+int s3c2410_gpio_getirq(unsigned int pin)
+{
+	if (pin < S3C2410_GPF0 || pin > S3C2410_GPG15_EINT23)
+		return -1;	/* not valid interrupts */
+
+	if (pin < S3C2410_GPG0 && pin > S3C2410_GPF7)
+		return -1;	/* not valid pin */
+
+	if (pin < S3C2410_GPF4)
+		return (pin - S3C2410_GPF0) + IRQ_EINT0;
+
+	if (pin < S3C2410_GPG0)
+		return (pin - S3C2410_GPF4) + IRQ_EINT4;
+
+	return (pin - S3C2410_GPG0) + IRQ_EINT8;
+}
--- linux-2.6.9-rc3/include/asm-arm/arch-s3c2410/hardware.h	2004-10-01 13:22:47.000000000 +0100
+++ linux-2.6.9-rc3-work2/include/asm-arm/arch-s3c2410/hardware.h	2004-10-01 17:40:26.000000000 +0100
@@ -15,6 +15,7 @@
  *  03-Sep-2003 BJD  Linux v2.6 support
  *  12-Mar-2004 BJD  Fixed include protection, fixed type of clock vars
  *  14-Sep-2004 BJD  Added misccr and getpin to gpio
+ *  01-Oct-2004 BJD  Added the new gpio functions
 */
 
 #ifndef __ASM_ARCH_HARDWARE_H
@@ -45,6 +46,20 @@
 
 extern void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function);
 
+extern unsigned int s3c2410_gpio_getcfg(unsigned int pin);
+
+
+/* s3c2410_gpio_getirq
+ *
+ * turn the given pin number into the corresponding IRQ number
+ *
+ * returns:
+ *	< 0 = no interrupt for this pin
+ *	>=0 = interrupt number for the pin
+*/
+
+extern int s3c2410_gpio_getirq(unsigned int pin);
+
 /* s3c2410_gpio_pullup
  *
  * configure the pull-up control on the given pin
--- linux-2.6.9-rc3/include/asm-arm/arch-s3c2410/regs-gpio.h	2004-08-14 06:37:26.000000000 +0100
+++ linux-2.6.9-rc3-work2/include/asm-arm/arch-s3c2410/regs-gpio.h	2004-10-01 17:31:44.000000000 +0100
@@ -623,25 +623,25 @@
 #define S3C2410_GPG10         S3C2410_GPIONO(S3C2410_GPIO_BANKG, 10)
 #define S3C2410_GPG12_INP     (0x00 << 24)
 #define S3C2410_GPG12_OUTP    (0x01 << 24)
-#define S3C2410_GPG12_EINT18  (0x02 << 24)
+#define S3C2410_GPG12_EINT20  (0x02 << 24)
 #define S3C2410_GPG12_XMON    (0x03 << 24)
 
 #define S3C2410_GPG10         S3C2410_GPIONO(S3C2410_GPIO_BANKG, 10)
 #define S3C2410_GPG13_INP     (0x00 << 26)
 #define S3C2410_GPG13_OUTP    (0x01 << 26)
-#define S3C2410_GPG13_EINT18  (0x02 << 26)
+#define S3C2410_GPG13_EINT21  (0x02 << 26)
 #define S3C2410_GPG13_nXPON   (0x03 << 26)
 
 #define S3C2410_GPG10         S3C2410_GPIONO(S3C2410_GPIO_BANKG, 10)
 #define S3C2410_GPG14_INP     (0x00 << 28)
 #define S3C2410_GPG14_OUTP    (0x01 << 28)
-#define S3C2410_GPG14_EINT18  (0x02 << 28)
+#define S3C2410_GPG14_EINT22  (0x02 << 28)
 #define S3C2410_GPG14_YMON    (0x03 << 28)
 
 #define S3C2410_GPG10         S3C2410_GPIONO(S3C2410_GPIO_BANKG, 10)
 #define S3C2410_GPG15_INP     (0x00 << 30)
 #define S3C2410_GPG15_OUTP    (0x01 << 30)
-#define S3C2410_GPG15_EINT18  (0x02 << 30)
+#define S3C2410_GPG15_EINT23  (0x02 << 30)
 #define S3C2410_GPG15_nYPON   (0x03 << 30)