| bjd-2610-set2.patch | | This patchs-set is the aggregation of a number of currently queued patches that | have yet to be applied. The suggested version of the kernel to apply these to is | 2.6.10-rc1-bk2. | | The following patches are included in this release: | | [2134/3] S3C2410 - Power Management core (1/4) | [2135/3] S3C2410 - Power Management timer resume (2/4) | [2136/1] S3C2410 - Power Management IRQ wakeup (3/4) | [2138/1] S3C2410 - Power Management documentation (4/4) | [2139/1] BAST - Power management initialisation | [2146/1] S3C2410 - serial fixes and s3c2440 updates | [2147/1] S3C2410 - reorganise board support | [2148/1] S3C2410 - I2C platfrom data | [2149/1] S3C2410 - usb-simtec.c fixes and cleanup | [2151/1] S3C2410 - fix guard on include/asm-arm/arch-s3c2410/regs-iic.h | [2152/1] S3C2410 - lcd controller register fixes | [2155/1] S3C2410 - fix definition of S3C2410_UDC_MAXP_REG | [2156/1] S3C2410 - Documentation updates | [2157/2] S3C2410 - default configuration update | [2158/1] S3C2410 - clean warnings from arch/arm/mach-s3c2410/pm.c | [2159/1] BAST - include/asm-arm/arch-s3c2410/bast-pmu.h | [2161/1] S3C2410 - uncompressor low level uart configuration | [PATCH] Fix compile of drivers/i2c/busses/i2c-s3c2410.c | | patch urls: | | http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=2134/3 | http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=2135/3 | http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=2136/1 | http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=2138/1 | http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=2139/1 | http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=2146/1 | http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=2147/1 | http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=2148/1 | http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=2149/1 | http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=2151/1 | http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=2152/1 | http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=2155/1 | http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=2156/1 | http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=2157/2 | http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=2158/1 | http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=2159/1 | http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=2161/1 | http://www.fluff.org/ben/linux-26/s3c-i2cfix1.patch | | Files affected: | Documentation/arm/Samsung-S3C24XX/EB2410ITX.txt | 24 19 + 5 - 0 ! | Documentation/arm/Samsung-S3C24XX/Overview.txt | 19 14 + 5 - 0 ! | Documentation/arm/Samsung-S3C24XX/Suspend.txt | 88 88 + 0 - 0 ! | arch/arm/Kconfig.debug | 7 5 + 2 - 0 ! | arch/arm/boot/compressed/head.S | 9 9 + 0 - 0 ! | arch/arm/boot/compressed/vmlinux.lds | 55 0 + 55 - 0 ! | arch/arm/configs/bast_defconfig | 134 94 + 40 - 0 ! | arch/arm/configs/s3c2410_defconfig | 81 61 + 20 - 0 ! | arch/arm/kernel/debug.S | 26 25 + 1 - 0 ! | arch/arm/kernel/vmlinux.lds | 136 0 + 136 - 0 ! | arch/arm/mach-s3c2410/Kconfig | 27 27 + 0 - 0 ! | arch/arm/mach-s3c2410/Makefile | 4 4 + 0 - 0 ! | arch/arm/mach-s3c2410/cpu.c | 30 29 + 1 - 0 ! | arch/arm/mach-s3c2410/cpu.h | 16 16 + 0 - 0 ! | arch/arm/mach-s3c2410/irq.c | 81 74 + 7 - 0 ! | arch/arm/mach-s3c2410/mach-bast.c | 41 39 + 2 - 0 ! | arch/arm/mach-s3c2410/mach-h1940.c | 5 3 + 2 - 0 ! | arch/arm/mach-s3c2410/mach-smdk2410.c | 4 2 + 2 - 0 ! | arch/arm/mach-s3c2410/mach-vr1000.c | 5 3 + 2 - 0 ! | arch/arm/mach-s3c2410/pm.c | 585 585 + 0 - 0 ! | arch/arm/mach-s3c2410/pm.h | 36 36 + 0 - 0 ! | arch/arm/mach-s3c2410/s3c2410.c | 24 0 + 24 - 0 ! | arch/arm/mach-s3c2410/s3c2410.h | 15 1 + 14 - 0 ! | arch/arm/mach-s3c2410/s3c2440.c | 5 0 + 5 - 0 ! | arch/arm/mach-s3c2410/sleep.S | 168 168 + 0 - 0 ! | arch/arm/mach-s3c2410/time.c | 28 16 + 12 - 0 ! | arch/arm/mach-s3c2410/usb-simtec.c | 20 5 + 15 - 0 ! | drivers/i2c/busses/i2c-s3c2410.c | 3 1 + 2 - 0 ! | include/asm-arm/arch-s3c2410/bast-pmu.h | 43 43 + 0 - 0 ! | include/asm-arm/arch-s3c2410/iic.h | 36 36 + 0 - 0 ! | include/asm-arm/arch-s3c2410/regs-iic.h | 6 3 + 3 - 0 ! | include/asm-arm/arch-s3c2410/regs-lcd.h | 14 10 + 4 - 0 ! | include/asm-arm/arch-s3c2410/regs-serial.h | 9 9 + 0 - 0 ! | include/asm-arm/arch-s3c2410/regs-udc.h | 7 4 + 3 - 0 ! | include/asm-arm/arch-s3c2410/uncompress.h | 26 22 + 4 - 0 ! | include/asm-arm/arch/bast-cpld.h | 58 0 + 58 - 0 ! | include/asm-arm/arch/bast-irq.h | 33 0 + 33 - 0 ! | include/asm-arm/arch/bast-map.h | 150 0 + 150 - 0 ! | include/asm-arm/arch/dma.h | 320 0 + 320 - 0 ! | include/asm-arm/arch/hardware.h | 109 0 + 109 - 0 ! | include/asm-arm/arch/io.h | 198 0 + 198 - 0 ! | include/asm-arm/arch/irqs.h | 115 0 + 115 - 0 ! | include/asm-arm/arch/map.h | 148 0 + 148 - 0 ! | include/asm-arm/arch/memory.h | 38 0 + 38 - 0 ! | include/asm-arm/arch/nand.h | 48 0 + 48 - 0 ! | include/asm-arm/arch/param.h | 27 0 + 27 - 0 ! | include/asm-arm/arch/regs-clock.h | 120 0 + 120 - 0 ! | include/asm-arm/arch/regs-dsc.h | 183 0 + 183 - 0 ! | include/asm-arm/arch/regs-gpio.h | 819 0 + 819 - 0 ! | include/asm-arm/arch/regs-gpioj.h | 100 0 + 100 - 0 ! | include/asm-arm/arch/regs-iic.h | 50 0 + 50 - 0 ! | include/asm-arm/arch/regs-iis.h | 63 0 + 63 - 0 ! | include/asm-arm/arch/regs-irq.h | 43 0 + 43 - 0 ! | include/asm-arm/arch/regs-lcd.h | 107 0 + 107 - 0 ! | include/asm-arm/arch/regs-mem.h | 190 0 + 190 - 0 ! | include/asm-arm/arch/regs-nand.h | 43 0 + 43 - 0 ! | include/asm-arm/arch/regs-rtc.h | 63 0 + 63 - 0 ! | include/asm-arm/arch/regs-sdi.h | 112 0 + 112 - 0 ! | include/asm-arm/arch/regs-serial.h | 155 0 + 155 - 0 ! | include/asm-arm/arch/regs-spi.h | 56 0 + 56 - 0 ! | include/asm-arm/arch/regs-timer.h | 110 0 + 110 - 0 ! | include/asm-arm/arch/regs-udc.h | 162 0 + 162 - 0 ! | include/asm-arm/arch/regs-watchdog.h | 45 0 + 45 - 0 ! | include/asm-arm/arch/serial.h | 28 0 + 28 - 0 ! | include/asm-arm/arch/system.h | 84 0 + 84 - 0 ! | include/asm-arm/arch/timex.h | 33 0 + 33 - 0 ! | include/asm-arm/arch/uncompress.h | 110 0 + 110 - 0 ! | include/asm-arm/arch/usb-control.h | 45 0 + 45 - 0 ! | include/asm-arm/arch/vmalloc.h | 36 0 + 36 - 0 ! | include/asm-arm/arch/vr1000-cpld.h | 22 0 + 22 - 0 ! | include/asm-arm/arch/vr1000-irq.h | 30 0 + 30 - 0 ! | include/asm-arm/arch/vr1000-map.h | 112 0 + 112 - 0 ! | include/asm-arm/constants.h | 36 0 + 36 - 0 ! | include/asm-arm/mach-types.h | 7880 0 + 7880 - 0 ! | 74 files changed, 1451 insertions(+), 12447 deletions(-) | | Ben Dooks, Wed, 27 Oct 2004 12:05:05 +0100 diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/Documentation/arm/Samsung-S3C24XX/EB2410ITX.txt linux-2.6.10-rc1-bk2-set2/Documentation/arm/Samsung-S3C24XX/EB2410ITX.txt --- linux-2.6.10-rc1-bk2/Documentation/arm/Samsung-S3C24XX/EB2410ITX.txt 2004-10-18 22:55:35.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/Documentation/arm/Samsung-S3C24XX/EB2410ITX.txt 2004-10-25 10:17:30.000000000 +0100 @@ -15,7 +15,7 @@ ------------- To set the default configuration, use `make bast_defconfig` which - supports the commonly used features of this board + supports the commonly used features of this board. Support @@ -23,15 +23,23 @@ Official support information can be found on the Simtec Electronics website, at the product page http://www.simtec.co.uk/products/EB2410ITX/ - and http://www.simtec.co.uk/products/EB2410ITX/resources.html + + Useful links: + + - Resources Page http://www.simtec.co.uk/products/EB2410ITX/resources.html + + - Board FAQ at http://www.simtec.co.uk/products/EB2410ITX/faq.html + + - Bootloader info http://www.simtec.co.uk/products/SWABLE/resources.html + and FAQ http://www.simtec.co.uk/products/SWABLE/faq.html MTD --- - The NAND and NOR onboard are currently supported in the linux-mtd cvs, - and are awaiting merge in the mainline. see the linux-mtd project at - http://www.linux-mtd.infradead.org/ for more information. + The NAND and NOR support has been merged from the linux-mtd project. + Any prolbems, see http://www.linux-mtd.infradead.org/ for more + information or up-to-date versions of linux-mtd. IDE @@ -41,4 +49,10 @@ changing speed of devices, PIO Mode 4 capable drives should be used. +Maintainers +----------- + + This board is maintained by Simtec Electronics. + + (c) 2004 Ben Dooks, Simtec Electronics diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/Documentation/arm/Samsung-S3C24XX/Overview.txt linux-2.6.10-rc1-bk2-set2/Documentation/arm/Samsung-S3C24XX/Overview.txt --- linux-2.6.10-rc1-bk2/Documentation/arm/Samsung-S3C24XX/Overview.txt 2004-10-18 22:55:29.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/Documentation/arm/Samsung-S3C24XX/Overview.txt 2004-10-25 10:17:30.000000000 +0100 @@ -48,9 +48,9 @@ NAND ---- - The current kernels do not have direct support for the NAND - controller, the latest linux-mtd CVS has support for this. - See http://www.linux-mtd.infradead.org/ + The current kernels now have support for the s3c2410 NAND + controller. If there are any problems the latest linux-mtd + CVS can be found from http://www.linux-mtd.infradead.org/ Serial @@ -84,12 +84,21 @@ Port Contributors ----------------- - Ben Dooks + Ben Dooks (BJD) Vincent Sanders Herbert Potzl - Arnaud Patard + Arnaud Patard (RTP) Roc Wu + Klaus Fetscher + Dimitry Andric +Document Changes +---------------- + + 05 Sep 2004 - BJD - Added Document Changes section + 05 Sep 2004 - BJD - Added Klaus Fetscher to list of contributors + 25 Oct 2004 - BJD - Added Dimitry Andric to list of contributors + 25 Oct 2004 - BJD - Updated the MTD from the 2.6.9 merge Document Author --------------- diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/Documentation/arm/Samsung-S3C24XX/Suspend.txt linux-2.6.10-rc1-bk2-set2/Documentation/arm/Samsung-S3C24XX/Suspend.txt --- linux-2.6.10-rc1-bk2/Documentation/arm/Samsung-S3C24XX/Suspend.txt 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/Documentation/arm/Samsung-S3C24XX/Suspend.txt 2004-10-25 09:59:37.000000000 +0100 @@ -0,0 +1,88 @@ + S3C24XX Suspend Support + ======================= + + +Introduction +------------ + + The S3C2410 supports a low-power suspend mode, where the SDRAM is kept + in Self-Refresh mode, and all but the esential peripheral blocks are + powered down. For more information on how this works, please look + at the S3C2410 datasheets from Samsung. + + +Requirements +------------ + + 1) A bootloader that can support the necessary resume operation + + 2) Support for at least 1 source for resume + + 3) CONFIG_PM enabled in the kernel + + 4) Any peripherals that are going to be powered down at the same + time require suspend/resume support. + + +Resuming +-------- + + The S3C2410 user manual defines the process of sending the CPU to + sleep and how it resumes. The default behaviour of the Linux code + is to set the GSTATUS3 register to the physical address of the + code to resume Linux operation. + + GSTATUS4 is currently left alone by the sleep code, and is free to + use for any other purposes. + + +Machine Support +--------------- + + The machine specific functions must call the s3c2410_pm_init() function + to say that it's bootloader is capable of resuming. This can be as + simple as adding the following to the file: + + late_initcall(s3c2410_pm_init); + + A board can do its own setup before calling s3c2410_pm_init, if it + needs to setup anything else for power management support. + + There is currently no support for over-riding the default method of + saving the resume address, if your board requires it, then contact + the maintainer and discuss what is required. + + +Configuration +------------- + + The S3C2410 specific configuration in `System Type` defines various + aspects of how the S3C2410 suspend and resume support is configured + + `S3C2410 PM Suspend debug` + + This option prints messages to the serial console before and after + the actual suspend, giving detailed information on what is + happening + + + `S3C2410 PM Suspend Memory CRC` + + Allows the entire memory to be checksummed before and after the + suspend to see if there has been any corruption of the contents. + + This support requires the CRC32 function to be enabled. + + + `S3C2410 PM Suspend CRC Chunksize (KiB)` + + Defines the size of memory each CRC chunk covers. A smaller value + will mean that the CRC data block will take more memory, but will + identify any faults with better precision + + +Document Author +--------------- + +Ben Dooks, (c) 2004 Simtec Electronics + diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/Kconfig.debug linux-2.6.10-rc1-bk2-set2/arch/arm/Kconfig.debug --- linux-2.6.10-rc1-bk2/arch/arm/Kconfig.debug 2004-10-18 22:55:36.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/Kconfig.debug 2004-10-27 11:48:46.000000000 +0100 @@ -104,12 +104,15 @@ before it is used. config DEBUG_S3C2410_UART - depends on DEBUG_LL && ARCH_S3C2410 - int "S3C2410 UART to use for low-level debug" + depends on ARCH_S3C2410 + int "S3C2410 UART to use for low-level messages and debug" default "0" help Choice for UART for kernel low-level using S3C2410 UARTS, should be between zero and two. The port must have been initalised by the boot-loader before use. + This will affect the port that the uncompressor code uses + to send debug information to. + endmenu diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/boot/compressed/head.S linux-2.6.10-rc1-bk2-set2/arch/arm/boot/compressed/head.S --- linux-2.6.10-rc1-bk2/arch/arm/boot/compressed/head.S 2004-10-18 22:55:07.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/boot/compressed/head.S 2004-10-25 10:00:23.000000000 +0100 @@ -117,6 +117,15 @@ .macro writeb, rb str \rb, [r3, #0] .endm +#elif defined(CONFIG_ARCH_S3C2410) +#include + .macro loadsp, rb + mov \rb, #0x50000000 + add \rb, \rb, #0x4000 * CONFIG_DEBUG_S3C2410_UART + .endm + .macro writeb, rb + strb \rb, [r3, #0x20] + .endm #else #error no serial architecture defined #endif diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/boot/compressed/vmlinux.lds linux-2.6.10-rc1-bk2-set2/arch/arm/boot/compressed/vmlinux.lds --- linux-2.6.10-rc1-bk2/arch/arm/boot/compressed/vmlinux.lds 2004-10-26 12:55:30.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/boot/compressed/vmlinux.lds 1970-01-01 01:00:00.000000000 +0100 @@ -1,55 +0,0 @@ -/* - * linux/arch/arm/boot/compressed/vmlinux.lds.in - * - * Copyright (C) 2000 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -OUTPUT_ARCH(arm) -ENTRY(_start) -SECTIONS -{ - . = 0; - _text = .; - - .text : { - _start = .; - *(.start) - *(.text) - *(.fixup) - *(.gnu.warning) - *(.rodata) - *(.rodata.*) - *(.glue_7) - *(.glue_7t) - *(.piggydata) - . = ALIGN(4); - } - - _etext = .; - - _got_start = .; - .got : { *(.got) } - _got_end = .; - .got.plt : { *(.got.plt) } - .data : { *(.data) } - _edata = .; - - . = ALIGN(4); - __bss_start = .; - .bss : { *(.bss) } - _end = .; - - .stack (NOLOAD) : { *(.stack) } - - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - .comment 0 : { *(.comment) } -} - diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/configs/bast_defconfig linux-2.6.10-rc1-bk2-set2/arch/arm/configs/bast_defconfig --- linux-2.6.10-rc1-bk2/arch/arm/configs/bast_defconfig 2004-10-25 09:53:36.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/configs/bast_defconfig 2004-10-27 11:31:20.000000000 +0100 @@ -1,31 +1,35 @@ # # Automatically generated make config: don't edit +# Linux kernel version: 2.6.10-rc1-bk2 +# Wed Oct 27 11:31:14 2004 # CONFIG_ARM=y CONFIG_MMU=y CONFIG_UID16=y CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_IOMAP=y # # Code maturity level options # CONFIG_EXPERIMENTAL=y # CONFIG_CLEAN_COMPILE is not set -CONFIG_STANDALONE=y CONFIG_BROKEN=y CONFIG_BROKEN_ON_SMP=y # # General setup # +CONFIG_LOCALVERSION="" CONFIG_SWAP=y CONFIG_SYSVIPC=y # CONFIG_POSIX_MQUEUE is not set # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y # CONFIG_AUDIT is not set -CONFIG_LOG_BUF_SHIFT=17 +CONFIG_LOG_BUF_SHIFT=16 # CONFIG_HOTPLUG is not set +CONFIG_KOBJECT_UEVENT=y # CONFIG_IKCONFIG is not set # CONFIG_EMBEDDED is not set CONFIG_KALLSYMS=y @@ -33,11 +37,9 @@ # CONFIG_KALLSYMS_EXTRA_PASS is not set CONFIG_FUTEX=y CONFIG_EPOLL=y -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SHMEM=y +# CONFIG_TINY_SHMEM is not set # # Loadable module support @@ -46,6 +48,7 @@ # CONFIG_MODULE_UNLOAD is not set CONFIG_OBSOLETE_MODPARM=y # CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set CONFIG_KMOD=y # @@ -60,6 +63,7 @@ # CONFIG_ARCH_INTEGRATOR is not set # CONFIG_ARCH_IOP3XX is not set # CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set # CONFIG_ARCH_L7200 is not set # CONFIG_ARCH_PXA is not set # CONFIG_ARCH_RPC is not set @@ -69,14 +73,29 @@ # CONFIG_ARCH_LH7A40X is not set # CONFIG_ARCH_OMAP is not set # CONFIG_ARCH_VERSATILE_PB is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_H720X is not set # -# S3C2410 Implementations +# S3C24XX Implementations # CONFIG_ARCH_BAST=y -# CONFIG_ARCH_H1940 is not set -# CONFIG_ARCH_SMDK2410 is not set +CONFIG_ARCH_H1940=y +CONFIG_ARCH_SMDK2410=y CONFIG_MACH_VR1000=y +CONFIG_CPU_S3C2410=y + +# +# S3C2410 Setup +# +CONFIG_S3C2410_DMA=y +# CONFIG_S3C2410_DMA_DEBUG is not set +# CONFIG_S3C2410_PM_DEBUG is not set +# CONFIG_S3C2410_PM_CHECK is not set + +# +# h720x Implementations +# # # Processor Type @@ -108,9 +127,8 @@ # At least one math emulation must be selected # CONFIG_FPE_NWFPE=y -CONFIG_FPE_NWFPE_XP=y +# CONFIG_FPE_NWFPE_XP is not set # CONFIG_FPE_FASTFPE is not set -# CONFIG_VFP is not set CONFIG_BINFMT_ELF=y CONFIG_BINFMT_AOUT=y # CONFIG_BINFMT_MISC is not set @@ -118,13 +136,13 @@ # # Generic Driver Options # +CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y # CONFIG_DEBUG_DRIVER is not set -# CONFIG_PM is not set +CONFIG_PM=y # CONFIG_PREEMPT is not set +CONFIG_APM=y # CONFIG_ARTHUR is not set -CONFIG_S3C2410_DMA=y -# CONFIG_S3C2410_DMA_DEBUG is not set CONFIG_CMDLINE="root=/dev/hda1 ro init=/bin/bash console=ttySAC0" CONFIG_ALIGNMENT_TRAP=y @@ -164,9 +182,20 @@ # CONFIG_MTD_JEDECPROBE is not set CONFIG_MTD_GEN_PROBE=y # CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set CONFIG_MTD_CFI_INTELEXT=y # CONFIG_MTD_CFI_AMDSTD is not set # CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y # CONFIG_MTD_RAM is not set # CONFIG_MTD_ROM is not set # CONFIG_MTD_ABSENT is not set @@ -179,11 +208,13 @@ # CONFIG_MTD_PHYSMAP is not set # CONFIG_MTD_ARM_INTEGRATOR is not set # CONFIG_MTD_EDB7312 is not set +# CONFIG_MTD_BAST is not set # # Self-contained MTD device drivers # # CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set # CONFIG_MTD_MTDRAM is not set # CONFIG_MTD_BLKMTD is not set @@ -214,6 +245,16 @@ CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_SIZE=4096 CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CDROM_PKTCDVD is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y # # Multi-device support (RAID and LVM) @@ -246,6 +287,7 @@ # CONFIG_INET_AH is not set # CONFIG_INET_ESP is not set # CONFIG_INET_IPCOMP is not set +# CONFIG_INET_TUNNEL is not set # CONFIG_IPV6 is not set # CONFIG_NETFILTER is not set @@ -338,13 +380,13 @@ CONFIG_BLK_DEV_IDETAPE=m CONFIG_BLK_DEV_IDEFLOPPY=m # CONFIG_IDE_TASK_IOCTL is not set -# CONFIG_IDE_TASKFILE_IO is not set # # IDE chipset support/bugfixes # CONFIG_IDE_GENERIC=y # CONFIG_IDE_ARM is not set +CONFIG_BLK_DEV_IDE_BAST=y # CONFIG_BLK_DEV_IDEDMA is not set # CONFIG_IDEDMA_AUTO is not set # CONFIG_BLK_DEV_HD is not set @@ -395,16 +437,16 @@ # CONFIG_GAMEPORT is not set CONFIG_SOUND_GAMEPORT=y CONFIG_SERIO=y -# CONFIG_SERIO_I8042 is not set CONFIG_SERIO_SERPORT=y # CONFIG_SERIO_CT82C710 is not set # CONFIG_SERIO_PARKBD is not set +# CONFIG_SERIO_RAW is not set # # Input Device Drivers # CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ATKBD is not set +CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_SUNKBD is not set # CONFIG_KEYBOARD_LKKBD is not set # CONFIG_KEYBOARD_XTKBD is not set @@ -431,8 +473,6 @@ # CONFIG_DIGI is not set # CONFIG_MOXA_INTELLIO is not set # CONFIG_MOXA_SMARTIO is not set -# CONFIG_ISI is not set -# CONFIG_SYNCLINK is not set # CONFIG_SYNCLINKMP is not set # CONFIG_N_HDLC is not set # CONFIG_RISCOM8 is not set @@ -459,7 +499,7 @@ # CONFIG_SERIAL_S3C2410=y CONFIG_SERIAL_S3C2410_CONSOLE=y -# CONFIG_SERIAL_BAST_SIO is not set +CONFIG_SERIAL_BAST_SIO=y CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_UNIX98_PTYS=y @@ -469,7 +509,6 @@ # CONFIG_LP_CONSOLE is not set CONFIG_PPDEV=y # CONFIG_TIPAR is not set -# CONFIG_QIC02_TAPE is not set # # IPMI @@ -492,12 +531,9 @@ # CONFIG_DTLK is not set # CONFIG_R3964 is not set - # # Ftape, the floppy tape device driver # -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set # CONFIG_DRM is not set # CONFIG_RAW_DRIVER is not set @@ -512,35 +548,41 @@ # CONFIG_I2C_ALGOBIT=m # CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set # # I2C Hardware Bus support # -# CONFIG_I2C_AMD756 is not set -# CONFIG_I2C_AMD8111 is not set # CONFIG_I2C_ISA is not set # CONFIG_I2C_PARPORT is not set # CONFIG_I2C_PARPORT_LIGHT is not set +CONFIG_I2C_S3C2410=y # CONFIG_SCx200_ACB is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_PCA_ISA is not set # # Hardware Sensors Chip support # CONFIG_I2C_SENSOR=m # CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1031 is not set # CONFIG_SENSORS_ASB100 is not set # CONFIG_SENSORS_DS1621 is not set # CONFIG_SENSORS_FSCHER is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_IT87 is not set CONFIG_SENSORS_LM75=m +# CONFIG_SENSORS_LM77 is not set CONFIG_SENSORS_LM78=m # CONFIG_SENSORS_LM80 is not set # CONFIG_SENSORS_LM83 is not set CONFIG_SENSORS_LM85=m +# CONFIG_SENSORS_LM87 is not set # CONFIG_SENSORS_LM90 is not set # CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_SMSC47M1 is not set # CONFIG_SENSORS_W83781D is not set # CONFIG_SENSORS_W83L785TS is not set # CONFIG_SENSORS_W83627HF is not set @@ -628,9 +670,14 @@ # CONFIG_EFS_FS is not set CONFIG_JFFS_FS=y CONFIG_JFFS_FS_VERBOSE=0 +# CONFIG_JFFS_PROC_FS is not set CONFIG_JFFS2_FS=y CONFIG_JFFS2_FS_DEBUG=0 # CONFIG_JFFS2_FS_NAND is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set # CONFIG_CRAMFS is not set # CONFIG_VXFS_FS is not set # CONFIG_HPFS_FS is not set @@ -651,6 +698,7 @@ # CONFIG_EXPORTFS is not set CONFIG_SUNRPC=y # CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set # CONFIG_SMB_FS is not set # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set @@ -661,13 +709,7 @@ # Partition Types # CONFIG_PARTITION_ADVANCED=y -CONFIG_ACORN_PARTITION=y -CONFIG_ACORN_PARTITION_CUMANA=y -CONFIG_ACORN_PARTITION_EESOX=y -CONFIG_ACORN_PARTITION_ICS=y -CONFIG_ACORN_PARTITION_ADFS=y -CONFIG_ACORN_PARTITION_POWERTEC=y -CONFIG_ACORN_PARTITION_RISCIX=y +# CONFIG_ACORN_PARTITION is not set # CONFIG_OSF_PARTITION is not set # CONFIG_AMIGA_PARTITION is not set # CONFIG_ATARI_PARTITION is not set @@ -736,13 +778,14 @@ # Graphics support # CONFIG_FB=y +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set # CONFIG_FB_VIRTUAL is not set # # Console display driver support # # CONFIG_VGA_CONSOLE is not set -# CONFIG_MDA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y # CONFIG_FRAMEBUFFER_CONSOLE is not set @@ -763,6 +806,9 @@ # # USB support # +# CONFIG_USB is not set +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set # # USB Gadget Support @@ -770,17 +816,24 @@ # CONFIG_USB_GADGET is not set # +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# # Kernel hacking # -CONFIG_FRAME_POINTER=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_INFO=y CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SLAB is not set # CONFIG_MAGIC_SYSRQ is not set +# CONFIG_SCHEDSTATS is not set +# CONFIG_DEBUG_SLAB is not set # CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_WAITQ is not set +# CONFIG_DEBUG_KOBJECT is not set # CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_DEBUG_INFO=y +CONFIG_FRAME_POINTER=y +CONFIG_DEBUG_USER=y +# CONFIG_DEBUG_WAITQ is not set # CONFIG_DEBUG_ERRORS is not set CONFIG_DEBUG_LL=y # CONFIG_DEBUG_ICEDCC is not set @@ -790,6 +843,7 @@ # # Security options # +# CONFIG_KEYS is not set # CONFIG_SECURITY is not set # diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/configs/s3c2410_defconfig linux-2.6.10-rc1-bk2-set2/arch/arm/configs/s3c2410_defconfig --- linux-2.6.10-rc1-bk2/arch/arm/configs/s3c2410_defconfig 2004-10-25 09:53:36.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/configs/s3c2410_defconfig 2004-10-27 11:30:53.000000000 +0100 @@ -1,10 +1,13 @@ # # Automatically generated make config: don't edit +# Linux kernel version: 2.6.10-rc1-bk2 +# Wed Oct 27 11:30:39 2004 # CONFIG_ARM=y CONFIG_MMU=y CONFIG_UID16=y CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_IOMAP=y # # Code maturity level options @@ -17,6 +20,7 @@ # # General setup # +CONFIG_LOCALVERSION="" CONFIG_SWAP=y CONFIG_SYSVIPC=y # CONFIG_POSIX_MQUEUE is not set @@ -25,6 +29,7 @@ # CONFIG_AUDIT is not set CONFIG_LOG_BUF_SHIFT=16 # CONFIG_HOTPLUG is not set +CONFIG_KOBJECT_UEVENT=y # CONFIG_IKCONFIG is not set # CONFIG_EMBEDDED is not set CONFIG_KALLSYMS=y @@ -32,11 +37,9 @@ # CONFIG_KALLSYMS_EXTRA_PASS is not set CONFIG_FUTEX=y CONFIG_EPOLL=y -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SHMEM=y +# CONFIG_TINY_SHMEM is not set # # Loadable module support @@ -45,6 +48,7 @@ # CONFIG_MODULE_UNLOAD is not set CONFIG_OBSOLETE_MODPARM=y # CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set CONFIG_KMOD=y # @@ -59,6 +63,7 @@ # CONFIG_ARCH_INTEGRATOR is not set # CONFIG_ARCH_IOP3XX is not set # CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set # CONFIG_ARCH_L7200 is not set # CONFIG_ARCH_PXA is not set # CONFIG_ARCH_RPC is not set @@ -68,20 +73,29 @@ # CONFIG_ARCH_LH7A40X is not set # CONFIG_ARCH_OMAP is not set # CONFIG_ARCH_VERSATILE_PB is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_H720X is not set # -# S3C2410 Implementations +# S3C24XX Implementations # CONFIG_ARCH_BAST=y CONFIG_ARCH_H1940=y CONFIG_ARCH_SMDK2410=y CONFIG_MACH_VR1000=y +CONFIG_CPU_S3C2410=y # # S3C2410 Setup # CONFIG_S3C2410_DMA=y # CONFIG_S3C2410_DMA_DEBUG is not set +# CONFIG_S3C2410_PM_DEBUG is not set +# CONFIG_S3C2410_PM_CHECK is not set + +# +# h720x Implementations +# # # Processor Type @@ -113,9 +127,8 @@ # At least one math emulation must be selected # CONFIG_FPE_NWFPE=y -CONFIG_FPE_NWFPE_XP=y +# CONFIG_FPE_NWFPE_XP is not set # CONFIG_FPE_FASTFPE is not set -# CONFIG_VFP is not set CONFIG_BINFMT_ELF=y CONFIG_BINFMT_AOUT=y # CONFIG_BINFMT_MISC is not set @@ -126,8 +139,9 @@ CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y # CONFIG_DEBUG_DRIVER is not set -# CONFIG_PM is not set +CONFIG_PM=y # CONFIG_PREEMPT is not set +CONFIG_APM=y # CONFIG_ARTHUR is not set CONFIG_CMDLINE="root=/dev/hda1 ro init=/bin/bash console=ttySAC0" CONFIG_ALIGNMENT_TRAP=y @@ -194,6 +208,7 @@ # CONFIG_MTD_PHYSMAP is not set # CONFIG_MTD_ARM_INTEGRATOR is not set # CONFIG_MTD_EDB7312 is not set +# CONFIG_MTD_BAST is not set # # Self-contained MTD device drivers @@ -230,6 +245,16 @@ CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_SIZE=4096 CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CDROM_PKTCDVD is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y # # Multi-device support (RAID and LVM) @@ -262,6 +287,7 @@ # CONFIG_INET_AH is not set # CONFIG_INET_ESP is not set # CONFIG_INET_IPCOMP is not set +# CONFIG_INET_TUNNEL is not set # CONFIG_IPV6 is not set # CONFIG_NETFILTER is not set @@ -354,13 +380,13 @@ CONFIG_BLK_DEV_IDETAPE=m CONFIG_BLK_DEV_IDEFLOPPY=m # CONFIG_IDE_TASK_IOCTL is not set -# CONFIG_IDE_TASKFILE_IO is not set # # IDE chipset support/bugfixes # CONFIG_IDE_GENERIC=y # CONFIG_IDE_ARM is not set +# CONFIG_BLK_DEV_IDE_BAST is not set # CONFIG_BLK_DEV_IDEDMA is not set # CONFIG_IDEDMA_AUTO is not set # CONFIG_BLK_DEV_HD is not set @@ -411,10 +437,10 @@ # CONFIG_GAMEPORT is not set CONFIG_SOUND_GAMEPORT=y CONFIG_SERIO=y -# CONFIG_SERIO_I8042 is not set CONFIG_SERIO_SERPORT=y # CONFIG_SERIO_CT82C710 is not set # CONFIG_SERIO_PARKBD is not set +# CONFIG_SERIO_RAW is not set # # Input Device Drivers @@ -483,7 +509,6 @@ # CONFIG_LP_CONSOLE is not set CONFIG_PPDEV=y # CONFIG_TIPAR is not set -# CONFIG_QIC02_TAPE is not set # # IPMI @@ -509,7 +534,6 @@ # # Ftape, the floppy tape device driver # -# CONFIG_AGP is not set # CONFIG_DRM is not set # CONFIG_RAW_DRIVER is not set @@ -524,16 +548,18 @@ # CONFIG_I2C_ALGOBIT=m # CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set # # I2C Hardware Bus support # -# CONFIG_I2C_AMD756 is not set -# CONFIG_I2C_AMD8111 is not set # CONFIG_I2C_ISA is not set # CONFIG_I2C_PARPORT is not set # CONFIG_I2C_PARPORT_LIGHT is not set +CONFIG_I2C_S3C2410=y # CONFIG_SCx200_ACB is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_PCA_ISA is not set # # Hardware Sensors Chip support @@ -553,8 +579,10 @@ # CONFIG_SENSORS_LM80 is not set # CONFIG_SENSORS_LM83 is not set CONFIG_SENSORS_LM85=m +# CONFIG_SENSORS_LM87 is not set # CONFIG_SENSORS_LM90 is not set # CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_SMSC47M1 is not set # CONFIG_SENSORS_W83781D is not set # CONFIG_SENSORS_W83L785TS is not set # CONFIG_SENSORS_W83627HF is not set @@ -670,6 +698,7 @@ # CONFIG_EXPORTFS is not set CONFIG_SUNRPC=y # CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set # CONFIG_SMB_FS is not set # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set @@ -749,13 +778,14 @@ # Graphics support # CONFIG_FB=y +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set # CONFIG_FB_VIRTUAL is not set # # Console display driver support # # CONFIG_VGA_CONSOLE is not set -# CONFIG_MDA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y # CONFIG_FRAMEBUFFER_CONSOLE is not set @@ -776,6 +806,9 @@ # # USB support # +# CONFIG_USB is not set +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set # # USB Gadget Support @@ -783,17 +816,24 @@ # CONFIG_USB_GADGET is not set # +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# # Kernel hacking # -CONFIG_FRAME_POINTER=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_INFO=y CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SLAB is not set # CONFIG_MAGIC_SYSRQ is not set +# CONFIG_SCHEDSTATS is not set +# CONFIG_DEBUG_SLAB is not set # CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_WAITQ is not set +# CONFIG_DEBUG_KOBJECT is not set # CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_DEBUG_INFO=y +CONFIG_FRAME_POINTER=y +CONFIG_DEBUG_USER=y +# CONFIG_DEBUG_WAITQ is not set # CONFIG_DEBUG_ERRORS is not set CONFIG_DEBUG_LL=y # CONFIG_DEBUG_ICEDCC is not set @@ -803,6 +843,7 @@ # # Security options # +# CONFIG_KEYS is not set # CONFIG_SECURITY is not set # diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/kernel/debug.S linux-2.6.10-rc1-bk2-set2/arch/arm/kernel/debug.S --- linux-2.6.10-rc1-bk2/arch/arm/kernel/debug.S 2004-10-18 22:53:46.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/kernel/debug.S 2004-10-25 10:00:23.000000000 +0100 @@ -538,6 +538,9 @@ #elif defined(CONFIG_ARCH_S3C2410) #include #include +#include +#define S3C2410_UART1_OFF (0x4000) +#define SHIFT_2440TXF (14-9) .macro addruart, rx mrc p15, 0, \rx, c1, c0 @@ -559,7 +562,17 @@ beq 1001f @ @ FIFO enabled... 1003: + mrc p15, 0, \rd, c1, c0 + tst \rd, #1 + addeq \rd, \rx, #(S3C2410_PA_GPIO - S3C2410_PA_UART) + addne \rd, \rx, #(S3C2410_VA_GPIO - S3C2410_VA_UART) + bic \rd, \rd, #0xff000 + ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ] + and \rd, \rd, #0x00ff0000 + teq \rd, #0x00440000 @ is it 2440? + ldr \rd, [ \rx, # S3C2410_UFSTAT ] + moveq \rd, \rd, lsr #SHIFT_2440TXF tst \rd, #S3C2410_UFSTAT_TXFULL bne 1003b b 1002f @@ -580,8 +593,19 @@ beq 1001f @ @ FIFO enabled... 1003: + mrc p15, 0, \rd, c1, c0 + tst \rd, #1 + addeq \rd, \rx, #(S3C2410_PA_GPIO - S3C2410_PA_UART) + addne \rd, \rx, #(S3C2410_VA_GPIO - S3C2410_VA_UART) + bic \rd, \rd, #0xff000 + ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ] + and \rd, \rd, #0x00ff0000 + teq \rd, #0x00440000 @ is it 2440? + ldr \rd, [ \rx, # S3C2410_UFSTAT ] - ands \rd, \rd, #15< - */ -OUTPUT_ARCH(arm) -ENTRY(stext) - -jiffies = jiffies_64; - - - -SECTIONS -{ - . = 0xC0008000; - .init : { /* Init code and data */ - _stext = .; - __init_begin = .; - _sinittext = .; - *(.init.text) - _einittext = .; - __proc_info_begin = .; - *(.proc.info) - __proc_info_end = .; - __arch_info_begin = .; - *(.arch.info) - __arch_info_end = .; - __tagtable_begin = .; - *(.taglist) - __tagtable_end = .; - *(.init.data) - . = ALIGN(16); - __setup_start = .; - *(.init.setup) - __setup_end = .; - __early_begin = .; - *(__early_param) - __early_end = .; - __initcall_start = .; - *(.initcall1.init) - *(.initcall2.init) - *(.initcall3.init) - *(.initcall4.init) - *(.initcall5.init) - *(.initcall6.init) - *(.initcall7.init) - __initcall_end = .; - __con_initcall_start = .; - *(.con_initcall.init) - __con_initcall_end = .; - __security_initcall_start = .; - *(.security_initcall.init) - __security_initcall_end = .; - . = ALIGN(32); - __initramfs_start = .; - usr/built-in.o(.init.ramfs) - __initramfs_end = .; - . = ALIGN(4096); - __init_end = .; - } - - /DISCARD/ : { /* Exit code and data */ - *(.exit.text) - *(.exit.data) - *(.exitcall.exit) - } - - .text : { /* Real text segment */ - _text = .; /* Text and read-only data */ - *(.text) - __sched_text_start = .; *(.sched.text) __sched_text_end = .; - __lock_text_start = .; *(.spinlock.text) __lock_text_end = .; - *(.fixup) - *(.gnu.warning) - *(.rodata) - *(.rodata.*) - *(.glue_7) - *(.glue_7t) - *(.got) /* Global offset table */ - - _etext = .; /* End of text section */ - } - - . = ALIGN(16); - __ex_table : { /* Exception table */ - __start___ex_table = .; - *(__ex_table) - __stop___ex_table = .; - } - - .rodata : AT(ADDR(.rodata) - 0) { *(.rodata) *(.rodata.*) *(__vermagic) } .rodata1 : AT(ADDR(.rodata1) - 0) { *(.rodata1) } .pci_fixup : AT(ADDR(.pci_fixup) - 0) { __start_pci_fixups_header = .; *(.pci_fixup_header) __end_pci_fixups_header = .; __start_pci_fixups_final = .; *(.pci_fixup_final) __end_pci_fixups_final = .; __start_pci_fixups_enable = .; *(.pci_fixup_enable) __end_pci_fixups_enable = .; } __ksymtab : AT(ADDR(__ksymtab) - 0) { __start___ksymtab = .; *(__ksymtab) __stop___ksymtab = .; } __ksymtab_gpl : AT(ADDR(__ksymtab_gpl) - 0) { __start___ksymtab_gpl = .; *(__ksymtab_gpl) __stop___ksymtab_gpl = .; } __kcrctab : AT(ADDR(__kcrctab) - 0) { __start___kcrctab = .; *(__kcrctab) __stop___kcrctab = .; } __kcrctab_gpl : AT(ADDR(__kcrctab_gpl) - 0) { __start___kcrctab_gpl = .; *(__kcrctab_gpl) __stop___kcrctab_gpl = .; } __ksymtab_strings : AT(ADDR(__ksymtab_strings) - 0) { *(__ksymtab_strings) } __param : AT(ADDR(__param) - 0) { __start___param = .; *(__param) __stop___param = .; } - - . = ALIGN(8192); - - .data : { - /* - * first, the init task union, aligned - * to an 8192 byte boundary. - */ - *(.init.task) - - . = ALIGN(4096); - __nosave_begin = .; - *(.data.nosave) - . = ALIGN(4096); - __nosave_end = .; - - /* - * then the cacheline aligned data - */ - . = ALIGN(32); - *(.data.cacheline_aligned) - - /* - * and the usual data section - */ - *(.data) - CONSTRUCTORS - - _edata = .; - } - - .bss : { - __bss_start = .; /* BSS */ - *(.bss) - *(COMMON) - _end = . ; - } - /* Stabs debugging sections. */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - .comment 0 : { *(.comment) } -} diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/Kconfig linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/Kconfig --- linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/Kconfig 2004-10-18 22:53:51.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/Kconfig 2004-10-25 09:58:01.000000000 +0100 @@ -72,4 +72,31 @@ the CPU time doing so. +config S3C2410_PM_DEBUG + bool "S3C2410 PM Suspend debug" + depends on ARCH_S3C2410 && PM + help + Say Y here if you want verbose debugging from the PM Suspend and + Resume code. See `Documentation/arm/Samsing-S3C24XX/Suspend.txt` + for more information. + +config S3C2410_PM_CHECK + bool "S3C2410 PM Suspend Memory CRC" + depends on ARCH_S3C2410 && PM && CRC32 + help + Enable the PM code's memory area checksum over sleep. This option + will generate CRCs of all blocks of memory, and store them before + going to sleep. The blocks are then checked on resume for any + errors. + +config S3C2410_PM_CHECK_CHUNKSIZE + int "S3C2410 PM Suspend CRC Chunksize (KiB)" + depends on ARCH_S3C2410 && PM && S3C2410_PM_CHECK + default 64 + help + Set the chunksize in Kilobytes of the CRC for checking memory + corruption over suspend and resume. A smaller value will mean that + the CRC data block will take more memory, but wil identify any + faults with better precision. + endif diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/Makefile linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/Makefile --- linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/Makefile 2004-10-18 22:53:25.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/Makefile 2004-10-25 09:58:01.000000000 +0100 @@ -15,6 +15,10 @@ obj-$(CONFIG_CPU_S3C2410) += s3c2410.o obj-$(CONFIG_S3C2410_DMA) += dma.o +# Power Management support + +obj-$(CONFIG_PM) += pm.o sleep.o + # S3C2440 support obj-$(CONFIG_CPU_S3C2440) += s3c2440.o s3c2440-dsc.o diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/cpu.c linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/cpu.c --- linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/cpu.c 2004-10-25 09:53:36.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/cpu.c 2004-10-25 10:00:43.000000000 +0100 @@ -112,6 +112,17 @@ return NULL; } +/* board information */ + +static struct s3c24xx_board *board; + +void s3c24xx_set_board(struct s3c24xx_board *b) +{ + board = b; +} + +/* cpu information */ + static struct cpu_table *cpu; void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) @@ -141,12 +152,29 @@ static int __init s3c_arch_init(void) { + int ret; + // do the correct init for cpu if (cpu == NULL) panic("s3c_arch_init: NULL cpu\n"); - return (cpu->init)(); + ret = (cpu->init)(); + if (ret != 0) + return ret; + + if (board != NULL) { + ret = platform_add_devices(board->devices, board->devices_count); + if (ret) { + printk(KERN_ERR "s3c24xx: failed to add board devices (%d)\n", ret); + } + + /* mask any error, we may not need all these board + * devices */ + ret = 0; + } + + return ret; } arch_initcall(s3c_arch_init); diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/cpu.h linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/cpu.h --- linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/cpu.h 2004-10-25 09:53:36.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/cpu.h 2004-10-25 10:00:43.000000000 +0100 @@ -11,6 +11,7 @@ * * Modifications: * 24-Aug-2004 BJD Start of generic S3C24XX support + * 18-Oct-2004 BJD Moved board struct into this file */ #define IODESC_ENT(x) { S3C2410_VA_##x, S3C2410_PA_##x, S3C2410_SZ_##x, MT_DEVICE } @@ -38,3 +39,18 @@ #endif extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); + +/* the board structure is used at first initialsation time + * to get info such as the devices to register for this + * board. This is done because platfrom_add_devices() cannot + * be called from the map_io entry. +*/ + +struct s3c24xx_board { + struct platform_device **devices; + unsigned int devices_count; +}; + +extern void s3c24xx_set_board(struct s3c24xx_board *board); + + diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/irq.c linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/irq.c --- linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/irq.c 2004-10-18 22:53:46.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/irq.c 2004-10-25 09:58:58.000000000 +0100 @@ -33,9 +33,11 @@ * * 05-Oct-2004 Ben Dooks * Tidy up KF's patch and sort out new release + * + * 05-Oct-2004 Ben Dooks + * Add support for power management controls */ - #include #include #include @@ -52,10 +54,73 @@ #include #include +#include "pm.h" #define irqdbf(x...) #define irqdbf2(x...) +#define EXTINT_OFF (IRQ_EINT4 - 4) + +/* wakeup irq control */ + +#ifdef CONFIG_PM + +/* state for IRQs over sleep */ + +/* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources + * + * set bit to 1 in allow bitfield to enable the wakeup settings on it +*/ + +unsigned long s3c_irqwake_intallow = 1L << (IRQ_RTC - IRQ_EINT0) | 0xfL; +unsigned long s3c_irqwake_intmask = 0xffffffffL; +unsigned long s3c_irqwake_eintallow = 0x0000fff0L; +unsigned long s3c_irqwake_eintmask = 0xffffffffL; + +static int +s3c_irq_wake(unsigned int irqno, unsigned int state) +{ + unsigned long irqbit = 1 << (irqno - IRQ_EINT0); + + if (!(s3c_irqwake_intallow & irqbit)) + return -ENOENT; + + printk(KERN_INFO "wake %s for irq %d\n", + state ? "enabled" : "disabled", irqno); + + if (!state) + s3c_irqwake_intmask |= irqbit; + else + s3c_irqwake_intmask &= irqbit; + + return 0; +} + +static int +s3c_irqext_wake(unsigned int irqno, unsigned int state) +{ + unsigned long bit = 1L << (irqno - EXTINT_OFF); + + if (!(s3c_irqwake_eintallow & bit)) + return -ENOENT; + + printk(KERN_INFO "wake %s for irq %d\n", + state ? "enabled" : "disabled", irqno); + + if (!state) + s3c_irqwake_eintmask |= bit; + else + s3c_irqwake_eintmask &= ~bit; + + return 0; +} + +#else +#define s3c_irqext_wake NULL +#define s3c_irq_wake NULL +#endif + + static void s3c_irq_mask(unsigned int irqno) { @@ -109,21 +174,21 @@ static struct irqchip s3c_irq_level_chip = { .ack = s3c_irq_maskack, .mask = s3c_irq_mask, - .unmask = s3c_irq_unmask + .unmask = s3c_irq_unmask, + .wake = s3c_irq_wake }; static struct irqchip s3c_irq_chip = { .ack = s3c_irq_ack, .mask = s3c_irq_mask, - .unmask = s3c_irq_unmask + .unmask = s3c_irq_unmask, + .wake = s3c_irq_wake }; /* S3C2410_EINTMASK * S3C2410_EINTPEND */ -#define EXTINT_OFF (IRQ_EINT4 - 4) - static void s3c_irqext_mask(unsigned int irqno) { @@ -276,14 +341,16 @@ .mask = s3c_irqext_mask, .unmask = s3c_irqext_unmask, .ack = s3c_irqext_ack, - .type = s3c_irqext_type + .type = s3c_irqext_type, + .wake = s3c_irqext_wake }; static struct irqchip s3c_irq_eint0t4 = { .ack = s3c_irq_ack, .mask = s3c_irq_mask, .unmask = s3c_irq_unmask, - .type = s3c_irqext_type + .wake = s3c_irq_wake, + .type = s3c_irqext_type, }; /* mask values for the parent registers for each of the interrupt types */ diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/mach-bast.c linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/mach-bast.c --- linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/mach-bast.c 2004-10-25 09:53:36.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/mach-bast.c 2004-10-25 10:00:43.000000000 +0100 @@ -18,6 +18,7 @@ * 05-Sep-2003 BJD Moved to v2.6 kernel * 06-Jan-2003 BJD Updates for * 18-Jan-2003 BJD Added serial port configuration + * 05-Oct-2004 BJD Power management code */ #include @@ -33,6 +34,7 @@ #include #include +#include #include #include @@ -41,11 +43,16 @@ //#include #include +#include +#include #include "s3c2410.h" #include "devs.h" #include "cpu.h" #include "usb-simtec.h" +#include "pm.h" + +#define COPYRIGHT ", (c) 2004 Simtec Electronics" /* macros for virtual address mods for the io space entries */ #define VA_C5(item) ((item) + BAST_VAM_CS5) @@ -207,7 +214,7 @@ &bast_device_nor }; -static struct s3c2410_board bast_board __initdata = { +static struct s3c24xx_board bast_board __initdata = { .devices = bast_devices, .devices_count = ARRAY_SIZE(bast_devices) }; @@ -216,7 +223,7 @@ { s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc)); s3c2410_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs)); - s3c2410_set_board(&bast_board); + s3c24xx_set_board(&bast_board); usb_simtec_init(); } @@ -225,6 +232,36 @@ s3c2410_init_irq(); } +#ifdef CONFIG_PM + +/* bast_init_pm + * + * enable the power management functions for the EB2410ITX +*/ + +static __init int bast_init_pm(void) +{ + unsigned long gstatus4; + + if (!machine_is_bast()) + return 0; + + printk(KERN_INFO "BAST Power Manangement" COPYRIGHT "\n"); + + gstatus4 = (__raw_readl(S3C2410_BANKCON7) & 0x3) << 30; + gstatus4 |= (__raw_readl(S3C2410_BANKCON6) & 0x3) << 28; + gstatus4 |= (__raw_readl(S3C2410_BANKSIZE) & S3C2410_BANKSIZE_MASK); + + printk(KERN_DEBUG "setting GSTATUS4 to %08lx\n", gstatus4); + __raw_writel(gstatus4, S3C2410_GSTATUS4); + + return s3c2410_pm_init(); +} + +late_initcall(bast_init_pm); +#endif + + MACHINE_START(BAST, "Simtec-BAST") MAINTAINER("Ben Dooks ") BOOT_MEM(S3C2410_SDRAM_PA, S3C2410_PA_UART, S3C2410_VA_UART) diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/mach-h1940.c linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/mach-h1940.c --- linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/mach-h1940.c 2004-10-25 09:53:36.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/mach-h1940.c 2004-10-25 10:00:43.000000000 +0100 @@ -18,6 +18,7 @@ * 17-Feb-2003 BJD Copied to mach-ipaq.c * 21-Aug-2004 BJD Added struct s3c2410_board * 04-Sep-2004 BJD Changed uart init, renamed ipaq_ -> h1940_ + * 18-Oct-2004 BJD Updated new board structure name */ #include @@ -92,7 +93,7 @@ &s3c_device_iis, }; -static struct s3c2410_board h1940_board __initdata = { +static struct s3c24xx_board h1940_board __initdata = { .devices = h1940_devices, .devices_count = ARRAY_SIZE(h1940_devices) }; @@ -101,7 +102,7 @@ { s3c24xx_init_io(h1940_iodesc, ARRAY_SIZE(h1940_iodesc)); s3c2410_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs)); - s3c2410_set_board(&h1940_board); + s3c24xx_set_board(&h1940_board); } void __init h1940_init_irq(void) diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/mach-smdk2410.c linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/mach-smdk2410.c --- linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/mach-smdk2410.c 2004-10-25 09:53:36.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/mach-smdk2410.c 2004-10-25 10:00:43.000000000 +0100 @@ -96,7 +96,7 @@ &s3c_device_iis, }; -static struct s3c2410_board smdk2410_board __initdata = { +static struct s3c24xx_board smdk2410_board __initdata = { .devices = smdk2410_devices, .devices_count = ARRAY_SIZE(smdk2410_devices) }; @@ -105,7 +105,7 @@ { s3c24xx_init_io(smdk2410_iodesc, ARRAY_SIZE(smdk2410_iodesc)); s3c2410_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs)); - s3c2410_set_board(&smdk2410_board); + s3c24xx_set_board(&smdk2410_board); } void __init smdk2410_init_irq(void) diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/mach-vr1000.c linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/mach-vr1000.c --- linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/mach-vr1000.c 2004-10-25 09:53:36.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/mach-vr1000.c 2004-10-25 10:00:43.000000000 +0100 @@ -16,6 +16,7 @@ * 21-Aug-2004 BJD Added struct s3c2410_board * 06-Aug-2004 BJD Fixed call to time initialisation * 05-Apr-2004 BJD Copied to make mach-vr1000.c + * 18-Oct-2004 BJD Updated board struct */ #include @@ -151,7 +152,7 @@ &s3c_device_iis, }; -static struct s3c2410_board vr1000_board __initdata = { +static struct s3c24xx_board vr1000_board __initdata = { .devices = vr1000_devices, .devices_count = ARRAY_SIZE(vr1000_devices) }; @@ -161,7 +162,7 @@ { s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc)); s3c2410_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs)); - s3c2410_set_board(&vr1000_board); + s3c24xx_set_board(&vr1000_board); usb_simtec_init(); } diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/pm.c linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/pm.c --- linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/pm.c 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/pm.c 2004-10-25 10:46:41.000000000 +0100 @@ -0,0 +1,585 @@ +/* linux/arch/arm/mach-s3c2410/pm.c + * + * Copyright (c) 2004 Simtec Electronics + * Ben Dooks + * + * S3C2410 Power Manager (Suspend-To-RAM) support + * + * See Documentation/arm/Samsung-S3C24XX/Suspend.txt for more information + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * Parts based on arch/arm/mach-pxa/pm.c + * +*/ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include + +#include + +#include "pm.h" + +/* for external use */ + +unsigned long s3c_pm_flags; + +/* cache functions from arch/arm/mm/proc-arm920.S */ + +extern void arm920_flush_kern_cache_all(void); + +#define PFX "s3c24xx-pm: " + +/* sleep save info */ + +struct sleep_save { + unsigned long reg; + unsigned long val; +}; + +#define SAVE_ITEM(x) \ + { .reg = (x) } + +static struct sleep_save core_save[] = { + SAVE_ITEM(S3C2410_LOCKTIME), + SAVE_ITEM(S3C2410_CLKCON) +}; + +/* this lot should be really saved by the IRQ code */ +static struct sleep_save irq_save[] = { + SAVE_ITEM(S3C2410_EINTMASK), + SAVE_ITEM(S3C2410_INTMSK), + SAVE_ITEM(S3C2410_EINFLT0), + SAVE_ITEM(S3C2410_EINFLT1), + SAVE_ITEM(S3C2410_EINFLT2), + SAVE_ITEM(S3C2410_EINFLT3) +}; + +static struct sleep_save gpio_save[] = { + SAVE_ITEM(S3C2410_GPACON), + SAVE_ITEM(S3C2410_GPADAT), + + SAVE_ITEM(S3C2410_GPBCON), + SAVE_ITEM(S3C2410_GPBDAT), + SAVE_ITEM(S3C2410_GPBUP), + + SAVE_ITEM(S3C2410_GPCCON), + SAVE_ITEM(S3C2410_GPCDAT), + SAVE_ITEM(S3C2410_GPCUP), + + SAVE_ITEM(S3C2410_GPDCON), + SAVE_ITEM(S3C2410_GPDDAT), + SAVE_ITEM(S3C2410_GPDUP), + + SAVE_ITEM(S3C2410_GPECON), + SAVE_ITEM(S3C2410_GPEDAT), + SAVE_ITEM(S3C2410_GPEUP), + + SAVE_ITEM(S3C2410_GPFCON), + SAVE_ITEM(S3C2410_GPFDAT), + SAVE_ITEM(S3C2410_GPFUP), + + SAVE_ITEM(S3C2410_GPGCON), + SAVE_ITEM(S3C2410_GPGDAT), + SAVE_ITEM(S3C2410_GPGUP), + + SAVE_ITEM(S3C2410_GPHCON), + SAVE_ITEM(S3C2410_GPHDAT), + SAVE_ITEM(S3C2410_GPHUP), +}; + +#ifdef CONFIG_S3C2410_PM_DEBUG +/* debug + * + * we send the debug to printascii() to allow it to be seen if the + * system never wakes up from the sleep +*/ + +extern void printascii(const char *); + +static void pm_dbg(const char *fmt, ...) +{ + va_list va; + char buff[256]; + + va_start(va, fmt); + vsprintf(buff, fmt, va); + va_end(va); + + printascii(buff); +} + + +#define DBG(fmt...) pm_dbg(fmt) +#else +#define DBG(fmt...) printk(KERN_DEBUG fmt) +#endif + +#if defined(CONFIG_S3C2410_PM_CHECK) && CONFIG_S3C2410_PM_CHECK_CHUNKSIZE != 0 + +/* suspend checking code... + * + * this next area does a set of crc checks over all the installed + * memory, so the system can verify if the resume was ok. + * + * CONFIG_S3C2410_PM_CHECK_CHUNKSIZE defines the block-size for the CRC, + * increasing it will mean that the area corrupted will be less easy to spot, + * and reducing the size will cause the CRC save area to grow +*/ + +#define CHECK_CHUNKSIZE (CONFIG_S3C2410_PM_CHECK_CHUNKSIZE * 1024) + +static u32 crc_size; /* size needed for the crc block */ +static u32 *crcs; /* allocated over suspend/resume */ + +typedef u32 *(run_fn_t)(struct resource *ptr, u32 *arg); + +/* s3c2410_pm_run_res + * + * go thorugh the given resource list, and look for system ram +*/ + +static void s3c2410_pm_run_res(struct resource *ptr, run_fn_t fn, u32 *arg) +{ + while (ptr != NULL) { + if (ptr->child != NULL) + s3c2410_pm_run_res(ptr->child, fn, arg); + + if ((ptr->flags & IORESOURCE_MEM) && + strcmp(ptr->name, "System RAM") == 0) { + DBG("Found system RAM at %08lx..%08lx\n", + ptr->start, ptr->end); + arg = (fn)(ptr, arg); + } + + ptr = ptr->sibling; + } +} + +static void s3c2410_pm_run_sysram(run_fn_t fn, u32 *arg) +{ + s3c2410_pm_run_res(&iomem_resource, fn, arg); +} + +static u32 *s3c2410_pm_countram(struct resource *res, u32 *val) +{ + u32 size = (u32)(res->end - res->start)+1; + + size += CHECK_CHUNKSIZE-1; + size /= CHECK_CHUNKSIZE; + + DBG("Area %08lx..%08lx, %d blocks\n", res->start, res->end, size); + + *val += size * sizeof(u32); + return val; +} + +/* s3c2410_pm_prepare_check + * + * prepare the necessary information for creating the CRCs. This + * must be done before the final save, as it will require memory + * allocating, and thus touching bits of the kernel we do not + * know about. +*/ + +static void s3c2410_pm_check_prepare(void) +{ + crc_size = 0; + + s3c2410_pm_run_sysram(s3c2410_pm_countram, &crc_size); + + DBG("s3c2410_pm_prepare_check: %u checks needed\n", crc_size); + + crcs = kmalloc(crc_size+4, GFP_KERNEL); + if (crcs == NULL) + printk(KERN_ERR "Cannot allocated CRC save area\n"); +} + +static u32 *s3c2410_pm_makecheck(struct resource *res, u32 *val) +{ + unsigned long addr, left; + + for (addr = res->start; addr < res->end; + addr += CHECK_CHUNKSIZE) { + left = res->end - addr; + + if (left > CHECK_CHUNKSIZE) + left = CHECK_CHUNKSIZE; + + *val = crc32_le(~0, phys_to_virt(addr), left); + val++; + } + + return val; +} + +/* s3c2410_pm_check_store + * + * compute the CRC values for the memory blocks before the final + * sleep. +*/ + +static void s3c2410_pm_check_store(void) +{ + if (crcs != NULL) + s3c2410_pm_run_sysram(s3c2410_pm_makecheck, crcs); +} + +/* in_region + * + * return TRUE if the area defined by ptr..ptr+size contatins the + * what..what+whatsz +*/ + +static inline int in_region(void *ptr, int size, void *what, size_t whatsz) +{ + if ((what+whatsz) < ptr) + return 0; + + if (what > (ptr+size)) + return 0; + + return 1; +} + +static u32 *s3c2410_pm_runcheck(struct resource *res, u32 *val) +{ + void *save_at = phys_to_virt(s3c2410_sleep_save_phys); + unsigned long addr; + unsigned long left; + void *ptr; + u32 calc; + + for (addr = res->start; addr < res->end; + addr += CHECK_CHUNKSIZE) { + left = res->end - addr; + + if (left > CHECK_CHUNKSIZE) + left = CHECK_CHUNKSIZE; + + ptr = phys_to_virt(addr); + + if (in_region(ptr, left, crcs, crc_size)) { + DBG("skipping %08lx, has crc block in\n", addr); + goto skip_check; + } + + if (in_region(ptr, left, save_at, 32*4 )) { + DBG("skipping %08lx, has save block in\n", addr); + goto skip_check; + } + + /* calculate and check the checksum */ + + calc = crc32_le(~0, ptr, left); + if (calc != *val) { + printk(KERN_ERR PFX "Restore CRC error at " + "%08lx (%08x vs %08x)\n", addr, calc, *val); + + DBG("Restore CRC error at %08lx (%08x vs %08x)\n", + addr, calc, *val); + } + + skip_check: + val++; + } + + return val; +} + +/* s3c2410_pm_check_restore + * + * check the CRCs after the restore event and free the memory used + * to hold them +*/ + +static void s3c2410_pm_check_restore(void) +{ + if (crcs != NULL) { + s3c2410_pm_run_sysram(s3c2410_pm_runcheck, crcs); + kfree(crcs); + crcs = NULL; + } +} + +#else +#define s3c2410_pm_check_prepare() do { } while(0) +#define s3c2410_pm_check_restore() do { } while(0) +#define s3c2410_pm_check_store() do { } while(0) +#endif + +/* helper functions to save and restore register state */ + +static void s3c2410_pm_do_save(struct sleep_save *ptr, int count) +{ + for (; count > 0; count--, ptr++) { + ptr->val = __raw_readl(ptr->reg); + DBG("saved %08lx value %08lx\n", ptr->reg, ptr->val); + } +} + + +static void s3c2410_pm_do_restore(struct sleep_save *ptr, int count) +{ + for (; count > 0; count--, ptr++) { + DBG("restore %08lx (restore %08lx, current %08x)\n", + ptr->reg, ptr->val, __raw_readl(ptr->reg)); + __raw_writel(ptr->val, ptr->reg); + } +} + +/* s3c2410_pm_show_resume_irqs + * + * print any IRQs asserted at resume time (ie, we woke from) +*/ + +static void s3c2410_pm_show_resume_irqs(int start, unsigned long which, + unsigned long mask) +{ + int i; + + which &= ~mask; + + for (i = 0; i <= 31; i++) { + if ((which) & (1L<>= S3C2410_GPIO_OFFSET(pin)*2; + + if (!irqstate) { + if (pinstate == 0x02) + DBG("Leaving IRQ %d (pin %d) enabled\n", irq, pin); + } else { + if (pinstate == 0x02) { + DBG("Disabling IRQ %d (pin %d)\n", irq, pin); + s3c2410_gpio_cfgpin(pin, 0x00); + } + } +} + +/* s3c2410_pm_configure_extint + * + * configure all external interrupt pins +*/ + +static void s3c2410_pm_configure_extint(void) +{ + int pin; + + /* for each of the external interrupts (EINT0..EINT15) we + * need to check wether it is an external interrupt source, + * and then configure it as an input if it is not + */ + + for (pin = S3C2410_GPF0; pin <= S3C2410_GPF7; pin++) { + s3c2410_pm_check_resume_pin(pin, pin - S3C2410_GPF0); + } + + for (pin = S3C2410_GPG0; pin <= S3C2410_GPG7; pin++) { + s3c2410_pm_check_resume_pin(pin, (pin - S3C2410_GPG0)+8); + } +} + +#define any_allowed(mask, allow) (((mask) & (allow)) != (allow)) + +/* s3c2410_pm_enter + * + * central control for sleep/resume process +*/ + +static int s3c2410_pm_enter(u32 state) +{ + unsigned long regs_save[16]; + unsigned long tmp; + + DBG("s3c2410_pm_enter(%d)\n", state); + + if (state != PM_SUSPEND_MEM) { + printk(KERN_ERR PFX "error: only PM_SUSPEND_MEM supported\n"); + return -EINVAL; + } + + /* check if we have anything to wake-up with... bad things seem + * to happen if you suspend with no wakeup (system will often + * require a full power-cycle) + */ + + if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) && + !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) { + printk(KERN_ERR PFX "No sources enabled for wake-up!\n"); + printk(KERN_ERR PFX "Aborting sleep\n"); + return -EINVAL; + } + + /* prepare check area if configured */ + + s3c2410_pm_check_prepare(); + + /* store the physical address of the register recovery block */ + + s3c2410_sleep_save_phys = virt_to_phys(regs_save); + + DBG("s3c2410_sleep_save_phys=0x%08lx\n", s3c2410_sleep_save_phys); + + /* ensure at least GESTATUS3 has the resume address */ + + __raw_writel(virt_to_phys(s3c2410_cpu_resume), S3C2410_GSTATUS3); + + DBG("GSTATUS3 0x%08x\n", __raw_readl(S3C2410_GSTATUS3)); + DBG("GSTATUS4 0x%08x\n", __raw_readl(S3C2410_GSTATUS4)); + + /* save all necessary core registers not covered by the drivers */ + + s3c2410_pm_do_save(gpio_save, ARRAY_SIZE(gpio_save)); + s3c2410_pm_do_save(irq_save, ARRAY_SIZE(irq_save)); + s3c2410_pm_do_save(core_save, ARRAY_SIZE(core_save)); + + /* set the irq configuration for wake */ + + s3c2410_pm_configure_extint(); + + DBG("sleep: irq wakeup masks: %08lx,%08lx\n", + s3c_irqwake_intmask, s3c_irqwake_eintmask); + + __raw_writel(s3c_irqwake_intmask, S3C2410_INTMSK); + __raw_writel(s3c_irqwake_eintmask, S3C2410_EINTMASK); + + /* ack any outstanding external interrupts before we go to sleep */ + + __raw_writel(S3C2410_EINTPEND, __raw_readl(S3C2410_EINTPEND)); + + /* flush cache back to ram */ + + arm920_flush_kern_cache_all(); + + s3c2410_pm_check_store(); + + // need to make some form of time-delta + + /* send the cpu to sleep... */ + + __raw_writel(0x00, S3C2410_CLKCON); /* turn off clocks over sleep */ + + s3c2410_cpu_suspend(regs_save); + + /* unset the return-from-sleep flag, to ensure reset */ + + tmp = __raw_readl(S3C2410_GSTATUS2); + tmp &= S3C2410_GSTATUs2_OFFRESET; + __raw_writel(tmp, S3C2410_GSTATUS2); + + /* check what irq (if any) restored the system */ + + DBG("post sleep: IRQs 0x%08x, 0x%08x\n", + __raw_readl(S3C2410_SRCPND), + __raw_readl(S3C2410_EINTPEND)); + + s3c2410_pm_show_resume_irqs(IRQ_EINT0, __raw_readl(S3C2410_SRCPND), + s3c_irqwake_intmask); + + s3c2410_pm_show_resume_irqs(IRQ_EINT4-4, __raw_readl(S3C2410_EINTPEND), + s3c_irqwake_eintmask); + + DBG("post sleep, restoring state...\n"); + + s3c2410_pm_do_restore(core_save, ARRAY_SIZE(core_save)); + s3c2410_pm_do_restore(gpio_save, ARRAY_SIZE(gpio_save)); + s3c2410_pm_do_restore(irq_save, ARRAY_SIZE(irq_save)); + + DBG("post sleep, preparing to return\n"); + + s3c2410_pm_check_restore(); + + /* ok, let's return from sleep */ + + DBG("S3C2410 PM Resume (post-restore)\n"); + return 0; +} + +/* + * Called after processes are frozen, but before we shut down devices. + */ +static int s3c2410_pm_prepare(u32 state) +{ + return 0; +} + +/* + * Called after devices are re-setup, but before processes are thawed. + */ +static int s3c2410_pm_finish(u32 state) +{ + return 0; +} + +/* + * Set to PM_DISK_FIRMWARE so we can quickly veto suspend-to-disk. + */ +static struct pm_ops s3c2410_pm_ops = { + .pm_disk_mode = PM_DISK_FIRMWARE, + .prepare = s3c2410_pm_prepare, + .enter = s3c2410_pm_enter, + .finish = s3c2410_pm_finish, +}; + +/* s3c2410_pm_init + * + * Attach the power management functions. This should be called + * from the board specific initialisation if the board supports + * it. +*/ + +int __init s3c2410_pm_init(void) +{ + printk("S3C2410 Power Management, (c) 2004 Simtec Electronics\n"); + + pm_set_ops(&s3c2410_pm_ops); + return 0; +} diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/pm.h linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/pm.h --- linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/pm.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/pm.h 2004-10-25 09:58:01.000000000 +0100 @@ -0,0 +1,36 @@ +/* linux/arch/arm/mach-s3c2410/pm.h + * + * Copyright (c) 2004 Simtec Electronics + * Written by Ben Dooks, + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/* s3c2410_pm_init + * + * called from board at initialisation time to setup the power + * management +*/ + +extern __init int s3c2410_pm_init(void); + +/* configuration for the IRQ mask over sleep */ +extern unsigned long s3c_irqwake_intmask; +extern unsigned long s3c_irqwake_eintmask; + +/* IRQ masks for IRQs allowed to go to sleep (see irq.c) */ +extern unsigned long s3c_irqwake_intallow; +extern unsigned long s3c_irqwake_eintallow; + +/* Flags for PM Control */ + +extern unsigned long s3c_pm_flags; + +/* from sleep.S */ + +extern void s3c2410_cpu_suspend(unsigned long *saveblk); +extern void s3c2410_cpu_resume(void); + +extern unsigned long s3c2410_sleep_save_phys; diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/s3c2410.c linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/s3c2410.c --- linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/s3c2410.c 2004-10-25 09:53:36.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/s3c2410.c 2004-10-25 10:00:43.000000000 +0100 @@ -191,13 +191,6 @@ print_mhz(s3c24xx_pclk)); } -static struct s3c2410_board *board; - -void s3c2410_set_board(struct s3c2410_board *b) -{ - board = b; -} - int __init s3c2410_init(void) { int ret; @@ -205,22 +198,5 @@ printk("S3C2410: Initialising architecture\n"); ret = platform_add_devices(uart_devices, ARRAY_SIZE(uart_devices)); - if (ret) - return ret; - - if (board != NULL) { - if (board->devices != NULL) { - ret = platform_add_devices(board->devices, - board->devices_count); - - if (ret) { - printk(KERN_ERR "s3c2410: failed to add board devices (%d)\n", ret); - } - } - - /* not adding board devices may not be fatal */ - ret = 0; - } - return ret; } diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/s3c2410.h linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/s3c2410.h --- linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/s3c2410.h 2004-10-25 09:53:36.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/s3c2410.h 2004-10-25 10:00:43.000000000 +0100 @@ -13,6 +13,7 @@ * 18-Aug-2004 BJD Created initial version * 20-Aug-2004 BJD Added s3c2410_board struct * 04-Sep-2004 BJD Added s3c2410_init_uarts() call + * 17-Oct-2004 BJD Moved board out to cpu */ struct s3c2410_uartcfg; @@ -26,18 +27,4 @@ struct sys_timer; extern struct sys_timer s3c2410_timer; -/* the board structure is used at first initialsation time - * to get info such as the devices to register for this - * board. This is done because platfrom_add_devices() cannot - * be called from the map_io entry. - * -*/ - -struct s3c2410_board { - struct platform_device **devices; - unsigned int devices_count; -}; - -extern void s3c2410_set_board(struct s3c2410_board *board); - extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no); diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/s3c2440.c linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/s3c2440.c --- linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/s3c2440.c 2004-10-25 09:53:36.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/s3c2440.c 2004-10-25 10:00:43.000000000 +0100 @@ -178,11 +178,6 @@ printk("S3C2440: Initialising architecture\n"); ret = platform_add_devices(uart_devices, ARRAY_SIZE(uart_devices)); - if (ret) - return ret; - - // todo: board specific inits? - return ret; } diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/sleep.S linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/sleep.S --- linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/sleep.S 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/sleep.S 2004-10-25 09:58:01.000000000 +0100 @@ -0,0 +1,168 @@ +/* linux/arch/arm/mach-s3c2410/sleep.S + * + * Copyright (c) 2004 Simtec Electronics + * Ben Dooks + * + * S3C2410 Power Manager (Suspend-To-RAM) support + * + * Based on PXA/SA1100 sleep code by: + * Nicolas Pitre, (c) 2002 Monta Vista Software Inc + * Cliff Brake, (c) 2001 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#define CONFIG_DEBUG_RESUME + + .text + + /* s3c2410_cpu_suspend + * + * put the cpu into sleep mode + * + * entry: + * r0 = sleep save block + */ + +ENTRY(s3c2410_cpu_suspend) + stmfd sp!, { r4 - r12, lr } + + @@ store co-processor registers + + mrc p15, 0, r4, c15, c1, 0 @ CP access register + mrc p15, 0, r5, c13, c0, 0 @ PID + mrc p15, 0, r6, c3, c0, 0 @ Domain ID + mrc p15, 0, r7, c2, c0, 0 @ translation table base address + mrc p15, 0, r8, c2, c0, 0 @ auxiliary control register + mrc p15, 0, r9, c1, c0, 0 @ control register + + stmia r0, { r4 - r13 } + + @@ flush the caches to ensure everything is back out to + @@ SDRAM before the core powers down + + bl arm920_flush_kern_cache_all + + @@ prepare cpu to sleep + + ldr r4, =S3C2410_REFRESH + ldr r5, =S3C2410_MISCCR + ldr r6, =S3C2410_CLKCON + ldr r7, [ r4 ] @ get REFRESH (and ensure in TLB) + ldr r8, [ r5 ] @ get MISCCR (and ensure in TLB) + ldr r9, [ r6 ] @ get CLKCON (and ensure in TLB) + + orr r7, r7, #S3C2410_REFRESH_SELF @ SDRAM sleep command + orr r8, r8, #S3C2410_MISCCR_SDSLEEP @ SDRAM power-down signals + orr r9, r9, #S3C2410_CLKCON_POWER @ power down command + + teq pc, #0 @ first as a trial-run to load cache + bl s3c2410_do_sleep + teq r0, r0 @ now do it for real + b s3c2410_do_sleep @ + + @@ align next bit of code to cache line + .align 8 +s3c2410_do_sleep: + streq r7, [ r4 ] @ SDRAM sleep command + streq r8, [ r5 ] @ SDRAM power-down config + streq r9, [ r6 ] @ CPU sleep +1: beq 1b + mov pc, r14 + + @@ return to the caller, after having the MMU + @@ turned on, this restores the last bits from the + @@ stack +resume_with_mmu: + ldmfd sp!, { r4 - r12, pc } + + .ltorg + + @@ the next bits sit in the .data segment, even though they + @@ happen to be code... the s3c2410_sleep_save_phys needs to be + @@ accessed by the resume code before it can restore the MMU. + @@ This means that the variable has to be close enough for the + @@ code to read it... since the .text segment needs to be RO, + @@ the data segment can be the only place to put this code. + + .data + + .global s3c2410_sleep_save_phys +s3c2410_sleep_save_phys: + .word 0 + + /* s3c2410_cpu_resume + * + * resume code entry for bootloader to call + * + * we must put this code here in the data segment as we have no + * other way of restoring the stack pointer after sleep, and we + * must not write to the code segment (code is read-only) + */ + +ENTRY(s3c2410_cpu_resume) + mov r0, #PSR_I_BIT | PSR_F_BIT | MODE_SVC + msr cpsr_c, r0 + + @@ load UART to allow us to print the two characters for + @@ resume debug + + mov r2, #S3C2410_PA_UART & 0xff000000 + orr r2, r2, #S3C2410_PA_UART & 0xff000 + +#ifdef CONFIG_DEBUG_RESUME + mov r3, #'L' + strb r3, [ r2, #S3C2410_UTXH ] +1001: + ldrb r14, [ r3, #S3C2410_UTRSTAT ] + tst r14, #S3C2410_UTRSTAT_TXE + beq 1001b +#endif /* CONFIG_DEBUG_RESUME */ + + mov r1, #0 + mcr p15, 0, r1, c8, c7, 0 @@ invalidate I & D TLBs + mcr p15, 0, r1, c7, c7, 0 @@ invalidate I & D caches + + ldr r0, s3c2410_sleep_save_phys @ address of restore block + ldmia r0, { r4 - r13 } + + mcr p15, 0, r4, c15, c1, 0 @ CP access register + mcr p15, 0, r5, c13, c0, 0 @ PID + mcr p15, 0, r6, c3, c0, 0 @ Domain ID + mcr p15, 0, r7, c2, c0, 0 @ translation table base + mcr p15, 0, r8, c1, c1, 0 @ auxilliary control + +#ifdef CONFIG_DEBUG_RESUME + mov r3, #'R' + strb r3, [ r2, #S3C2410_UTXH ] +#endif + + ldr r2, =resume_with_mmu + mcr p15, 0, r9, c1, c0, 0 @ turn on MMU, etc + nop @ second-to-last before mmu + mov pc, r2 @ go back to virtual address + + .ltorg diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/time.c linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/time.c --- linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/time.c 2004-10-25 09:53:36.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/time.c 2004-10-25 09:58:31.000000000 +0100 @@ -1,7 +1,7 @@ -/* linux/include/asm-arm/arch-s3c2410/time.h +/* linux/arch/arm/mach-s3c2410/time.c * - * Copyright (C) 2003 Simtec Electronics - * Ben Dooks, + * Copyright (C) 2003,2004 Simtec Electronics + * Ben Dooks, * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -39,10 +39,6 @@ static unsigned long timer_startval; static unsigned long timer_ticks_usec; -/* with an 12MHz clock, we get 12 ticks per-usec - */ - - /*** * Returns microsecond since last clock interrupt. Note that interrupts * will have been disabled by do_gettimeoffset() @@ -106,7 +102,7 @@ * Currently we only use timer4, as it is the only timer which has no * other function that can be exploited externally */ -static void __init s3c2410_timer_init (void) +static void s3c2410_timer_setup (void) { unsigned long tcon; unsigned long tcnt; @@ -126,6 +122,9 @@ if (machine_is_bast() || machine_is_vr1000()) { timer_ticks_usec = 12; /* timer is at 12MHz */ tcnt = (timer_ticks_usec * (1000*1000)) / HZ; + + tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK; + tcfg1 |= S3C2410_TCFG1_MUX4_TCLK1; } /* for the h1940, we use the pclk from the core to generate @@ -138,7 +137,8 @@ * of 11.25MHz, and a tcnt of 56250. */ - if (machine_is_h1940() || machine_is_smdk2410() ) { + if (machine_is_h1940() || machine_is_smdk2410() || + machine_is_rx3715()) { timer_ticks_usec = s3c24xx_pclk / (1000*1000); timer_ticks_usec /= 6; @@ -151,7 +151,6 @@ tcnt = (s3c24xx_pclk / 6) / HZ; } - printk("setup_timer tcon=%08lx, tcnt %04lx, tcfg %08lx,%08lx\n", tcon, tcnt, tcfg0, tcfg1); @@ -177,15 +176,20 @@ __raw_writel(tcnt, S3C2410_TCNTB(4)); __raw_writel(tcnt, S3C2410_TCMPB(4)); - setup_irq(IRQ_TIMER4, &s3c2410_timer_irq); - /* start the timer running */ tcon |= S3C2410_TCON_T4START; tcon &= ~S3C2410_TCON_T4MANUALUPD; __raw_writel(tcon, S3C2410_TCON); } +static void __init s3c2410_timer_init (void) +{ + s3c2410_timer_setup(); + setup_irq(IRQ_TIMER4, &s3c2410_timer_irq); +} + struct sys_timer s3c2410_timer = { .init = s3c2410_timer_init, .offset = s3c2410_gettimeoffset, + .resume = s3c2410_timer_setup }; diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/usb-simtec.c linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/usb-simtec.c --- linux-2.6.10-rc1-bk2/arch/arm/mach-s3c2410/usb-simtec.c 2004-10-18 22:54:39.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/arch/arm/mach-s3c2410/usb-simtec.c 2004-10-25 10:01:50.000000000 +0100 @@ -13,6 +13,7 @@ * * Modifications: * 14-Sep-2004 BJD Created + * 18-Oct-2004 BJD Cleanups, and added code to report OC cleared */ #define DEBUG @@ -51,10 +52,8 @@ { pr_debug("usb_simtec_powercontrol(%d,%d)\n", port, to); - if (port == 1) { + if (port == 1) s3c2410_gpio_setpin(S3C2410_GPB4, to ? 0:1); - pr_debug("GPBDAT now %08x\n", __raw_readl(S3C2410_GPBDAT)); - } } static irqreturn_t @@ -67,6 +66,7 @@ s3c2410_report_oc(info, 3); } else { pr_debug("usb_simtec: over-current irq (oc cleared)\n"); + s3c2410_report_oc(info, 0); } return IRQ_HANDLED; @@ -77,16 +77,15 @@ int ret; if (on) { - pr_debug("claiming usb overccurent\n"); ret = request_irq(IRQ_USBOC, usb_simtec_ocirq, SA_INTERRUPT, - "usb-oc", info); + "USB Over-current", info); if (ret != 0) { printk(KERN_ERR "failed to request usb oc irq\n"); } set_irq_type(IRQ_USBOC, IRQT_BOTHEDGE); } else { - free_irq(IRQ_USBOC, NULL); + free_irq(IRQ_USBOC, info); } } @@ -110,14 +109,5 @@ s3c2410_gpio_cfgpin(S3C2410_GPB4, S3C2410_GPB4_OUTP); s3c2410_gpio_setpin(S3C2410_GPB4, 1); - - pr_debug("GPB: CON=%08x, DAT=%08x\n", - __raw_readl(S3C2410_GPBCON), __raw_readl(S3C2410_GPBDAT)); - - if (0) { - s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST, - S3C2410_MISCCR_USBDEV); - } - return 0; } diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/drivers/i2c/busses/i2c-s3c2410.c linux-2.6.10-rc1-bk2-set2/drivers/i2c/busses/i2c-s3c2410.c --- linux-2.6.10-rc1-bk2/drivers/i2c/busses/i2c-s3c2410.c 2004-10-25 09:53:37.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/drivers/i2c/busses/i2c-s3c2410.c 2004-10-25 10:35:20.000000000 +0100 @@ -36,6 +36,7 @@ #include #include +#include #include #include @@ -534,7 +535,6 @@ static struct i2c_algorithm s3c24xx_i2c_algorithm = { .name = "S3C2410-I2C-Algorithm", - .id = I2C_ALGO_S3C2410, .master_xfer = s3c24xx_i2c_xfer, }; @@ -543,7 +543,6 @@ .wait = __WAIT_QUEUE_HEAD_INITIALIZER(s3c24xx_i2c.wait), .adap = { .name = "s3c2410-i2c", - .id = I2C_ALGO_S3C2410, .algo = &s3c24xx_i2c_algorithm, .retries = 2, }, diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/include/asm-arm/arch/bast-cpld.h linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/bast-cpld.h --- linux-2.6.10-rc1-bk2/include/asm-arm/arch/bast-cpld.h 2004-10-18 22:55:29.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/bast-cpld.h 1970-01-01 01:00:00.000000000 +0100 @@ -1,58 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/bast-cpld.h - * - * (c) 2003,2004 Simtec Electronics - * Ben Dooks - * - * BAST - CPLD control constants - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 25-May-2003 BJD Created file, added CTRL1 registers - * 30-Aug-2004 BJD Updated definitions from 2.4.26 port - * 30-Aug-2004 BJD Added CTRL3 and CTRL4 definitions -*/ - -#ifndef __ASM_ARCH_BASTCPLD_H -#define __ASM_ARCH_BASTCPLD_H - -/* CTRL1 - Audio LR routing */ - -#define BAST_CPLD_CTRL1_LRCOFF (0x00) -#define BAST_CPLD_CTRL1_LRCADC (0x01) -#define BAST_CPLD_CTRL1_LRCDAC (0x02) -#define BAST_CPLD_CTRL1_LRCARM (0x03) -#define BAST_CPLD_CTRL1_LRMASK (0x03) - -/* CTRL2 - NAND WP control, IDE Reset assert/check */ - -#define BAST_CPLD_CTRL2_WNAND (0x04) -#define BAST_CPLD_CTLR2_IDERST (0x08) - -/* CTRL3 - rom write control, CPLD identity */ - -#define BAST_CPLD_CTRL3_IDMASK (0x0e) -#define BAST_CPLD_CTRL3_ROMWEN (0x01) - -/* CTRL4 - 8bit LCD interface control/status */ - -#define BAST_CPLD_CTRL4_LLAT (0x01) -#define BAST_CPLD_CTRL4_LCDRW (0x02) -#define BAST_CPLD_CTRL4_LCDCMD (0x04) -#define BAST_CPLD_CTRL4_LCDE2 (0x01) - -/* CTRL5 - DMA routing */ - -#define BAST_CPLD_DMA0_PRIIDE (0<<0) -#define BAST_CPLD_DMA0_SECIDE (1<<0) -#define BAST_CPLD_DMA0_ISA15 (2<<0) -#define BAST_CPLD_DMA0_ISA36 (3<<0) - -#define BAST_CPLD_DMA1_PRIIDE (0<<2) -#define BAST_CPLD_DMA1_SECIDE (1<<2) -#define BAST_CPLD_DMA1_ISA15 (2<<2) -#define BAST_CPLD_DMA1_ISA36 (3<<2) - -#endif /* __ASM_ARCH_BASTCPLD_H */ diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/include/asm-arm/arch/bast-irq.h linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/bast-irq.h --- linux-2.6.10-rc1-bk2/include/asm-arm/arch/bast-irq.h 2004-10-18 22:54:38.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/bast-irq.h 1970-01-01 01:00:00.000000000 +0100 @@ -1,33 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/bast-irq.h - * - * (c) 2003,2004 Simtec Electronics - * Ben Dooks - * - * Machine BAST - IRQ Number definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 14-Sep-2004 BJD Fixed IRQ_USBOC definition - * 06-Jan-2003 BJD Linux 2.6.0 version - */ - -#ifndef __ASM_ARCH_BASTIRQ_H -#define __ASM_ARCH_BASTIRQ_H - -/* irq numbers to onboard peripherals */ - -#define IRQ_USBOC IRQ_EINT18 -#define IRQ_IDE0 IRQ_EINT16 -#define IRQ_IDE1 IRQ_EINT17 -#define IRQ_PCSERIAL1 IRQ_EINT15 -#define IRQ_PCSERIAL2 IRQ_EINT14 -#define IRQ_PCPARALLEL IRQ_EINT13 -#define IRQ_ASIX IRQ_EINT11 -#define IRQ_DM9000 IRQ_EINT10 -#define IRQ_ISA IRQ_EINT9 -#define IRQ_SMALERT IRQ_EINT8 - -#endif /* __ASM_ARCH_BASTIRQ_H */ diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/include/asm-arm/arch/bast-map.h linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/bast-map.h --- linux-2.6.10-rc1-bk2/include/asm-arm/arch/bast-map.h 2004-10-18 22:54:37.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/bast-map.h 1970-01-01 01:00:00.000000000 +0100 @@ -1,150 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/bast-map.h - * - * (c) 2003,2004 Simtec Electronics - * Ben Dooks - * - * Machine BAST - Memory map definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 06-Jan-2003 BJD Linux 2.6.0 version, moved bast specifics from arch/map.h - * 12-Mar-2004 BJD Fixed header include protection -*/ - -/* needs arch/map.h including with this */ - -/* ok, we've used up to 0x13000000, now we need to find space for the - * peripherals that live in the nGCS[x] areas, which are quite numerous - * in their space. We also have the board's CPLD to find register space - * for. - */ - -#ifndef __ASM_ARCH_BASTMAP_H -#define __ASM_ARCH_BASTMAP_H - -#define BAST_IOADDR(x) (S3C2410_ADDR((x) + 0x01300000)) - -/* we put the CPLD registers next, to get them out of the way */ - -#define BAST_VA_CTRL1 BAST_IOADDR(0x00000000) /* 0x01300000 */ -#define BAST_PA_CTRL1 (S3C2410_CS5 | 0x7800000) - -#define BAST_VA_CTRL2 BAST_IOADDR(0x00100000) /* 0x01400000 */ -#define BAST_PA_CTRL2 (S3C2410_CS1 | 0x6000000) - -#define BAST_VA_CTRL3 BAST_IOADDR(0x00200000) /* 0x01500000 */ -#define BAST_PA_CTRL3 (S3C2410_CS1 | 0x6800000) - -#define BAST_VA_CTRL4 BAST_IOADDR(0x00300000) /* 0x01600000 */ -#define BAST_PA_CTRL4 (S3C2410_CS1 | 0x7000000) - -/* next, we have the PC104 ISA interrupt registers */ - -#define BAST_PA_PC104_IRQREQ (S3C2410_CS5 | 0x6000000) /* 0x01700000 */ -#define BAST_VA_PC104_IRQREQ BAST_IOADDR(0x00400000) - -#define BAST_PA_PC104_IRQRAW (S3C2410_CS5 | 0x6800000) /* 0x01800000 */ -#define BAST_VA_PC104_IRQRAW BAST_IOADDR(0x00500000) - -#define BAST_PA_PC104_IRQMASK (S3C2410_CS5 | 0x7000000) /* 0x01900000 */ -#define BAST_VA_PC104_IRQMASK BAST_IOADDR(0x00600000) - -#define BAST_PA_LCD_RCMD1 (0x8800000) -#define BAST_VA_LCD_RCMD1 BAST_IOADDR(0x00700000) - -#define BAST_PA_LCD_WCMD1 (0x8000000) -#define BAST_VA_LCD_WCMD1 BAST_IOADDR(0x00800000) - -#define BAST_PA_LCD_RDATA1 (0x9800000) -#define BAST_VA_LCD_RDATA1 BAST_IOADDR(0x00900000) - -#define BAST_PA_LCD_WDATA1 (0x9000000) -#define BAST_VA_LCD_WDATA1 BAST_IOADDR(0x00A00000) - -#define BAST_PA_LCD_RCMD2 (0xA800000) -#define BAST_VA_LCD_RCMD2 BAST_IOADDR(0x00B00000) - -#define BAST_PA_LCD_WCMD2 (0xA000000) -#define BAST_VA_LCD_WCMD2 BAST_IOADDR(0x00C00000) - -#define BAST_PA_LCD_RDATA2 (0xB800000) -#define BAST_VA_LCD_RDATA2 BAST_IOADDR(0x00D00000) - -#define BAST_PA_LCD_WDATA2 (0xB000000) -#define BAST_VA_LCD_WDATA2 BAST_IOADDR(0x00E00000) - - -/* 0xE0000000 contains the IO space that is split by speed and - * wether the access is for 8 or 16bit IO... this ensures that - * the correct access is made - * - * 0x10000000 of space, partitioned as so: - * - * 0x00000000 to 0x04000000 8bit, slow - * 0x04000000 to 0x08000000 16bit, slow - * 0x08000000 to 0x0C000000 16bit, net - * 0x0C000000 to 0x10000000 16bit, fast - * - * each of these spaces has the following in: - * - * 0x00000000 to 0x01000000 16MB ISA IO space - * 0x01000000 to 0x02000000 16MB ISA memory space - * 0x02000000 to 0x02100000 1MB IDE primary channel - * 0x02100000 to 0x02200000 1MB IDE primary channel aux - * 0x02200000 to 0x02400000 1MB IDE secondary channel - * 0x02300000 to 0x02400000 1MB IDE secondary channel aux - * 0x02400000 to 0x02500000 1MB ASIX ethernet controller - * 0x02500000 to 0x02600000 1MB Davicom DM9000 ethernet controller - * 0x02600000 to 0x02700000 1MB PC SuperIO controller - * - * the phyiscal layout of the zones are: - * nGCS2 - 8bit, slow - * nGCS3 - 16bit, slow - * nGCS4 - 16bit, net - * nGCS5 - 16bit, fast - */ - -#define BAST_VA_MULTISPACE (0xE0000000) - -#define BAST_VA_ISAIO (BAST_VA_MULTISPACE + 0x00000000) -#define BAST_VA_ISAMEM (BAST_VA_MULTISPACE + 0x01000000) -#define BAST_VA_IDEPRI (BAST_VA_MULTISPACE + 0x02000000) -#define BAST_VA_IDEPRIAUX (BAST_VA_MULTISPACE + 0x02100000) -#define BAST_VA_IDESEC (BAST_VA_MULTISPACE + 0x02200000) -#define BAST_VA_IDESECAUX (BAST_VA_MULTISPACE + 0x02300000) -#define BAST_VA_ASIXNET (BAST_VA_MULTISPACE + 0x02400000) -#define BAST_VA_DM9000 (BAST_VA_MULTISPACE + 0x02500000) -#define BAST_VA_SUPERIO (BAST_VA_MULTISPACE + 0x02600000) - -#define BAST_VA_MULTISPACE (0xE0000000) - -#define BAST_VAM_CS2 (0x00000000) -#define BAST_VAM_CS3 (0x04000000) -#define BAST_VAM_CS4 (0x08000000) -#define BAST_VAM_CS5 (0x0C000000) - -/* physical offset addresses for the peripherals */ - -#define BAST_PA_ISAIO (0x00000000) -#define BAST_PA_ASIXNET (0x01000000) -#define BAST_PA_SUPERIO (0x01800000) -#define BAST_PA_IDEPRI (0x02000000) -#define BAST_PA_IDEPRIAUX (0x02800000) -#define BAST_PA_IDESEC (0x03000000) -#define BAST_PA_IDESECAUX (0x03800000) -#define BAST_PA_ISAMEM (0x04000000) -#define BAST_PA_DM9000 (0x05000000) - -/* some configurations for the peripherals */ - -#define BAST_PCSIO (BAST_VA_SUPERIO + BAST_VAM_CS2) -/* */ - -#define BAST_ASIXNET_CS BAST_VAM_CS5 -#define BAST_IDE_CS BAST_VAM_CS5 -#define BAST_DM9000_CS BAST_VAM_CS4 - -#endif /* __ASM_ARCH_BASTMAP_H */ diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/include/asm-arm/arch/dma.h linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/dma.h --- linux-2.6.10-rc1-bk2/include/asm-arm/arch/dma.h 2004-10-18 22:53:46.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/dma.h 1970-01-01 01:00:00.000000000 +0100 @@ -1,320 +0,0 @@ -/* linux/include/asm-arm/arch-bast/dma.h - * - * Copyright (C) 2003 Simtec Electronics - * Ben Dooks - * - * Samsung S3C2410X DMA support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * ??-May-2003 BJD Created file - * ??-Jun-2003 BJD Added more dma functionality to go with arch -*/ - - -#ifndef __ASM_ARCH_DMA_H -#define __ASM_ARCH_DMA_H - -#include -#include "hardware.h" - - -/* - * This is the maximum DMA address(physical address) that can be DMAd to. - * - */ -#define MAX_DMA_ADDRESS 0x20000000 -#define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */ - - -/* according to the samsung port, we cannot use the regular - * dma channels... we must therefore provide our own interface - * for DMA, and allow our drivers to use that. - */ - -#define MAX_DMA_CHANNELS 0 - - -/* we have 4 dma channels */ -#define S3C2410_DMA_CHANNELS (4) - -/* types */ - -typedef enum { - S3C2410_DMA_IDLE, - S3C2410_DMA_RUNNING, - S3C2410_DMA_PAUSED -} s3c2410_dma_state_t; - - -/* s3c2410_dma_loadst_t - * - * This represents the state of the DMA engine, wrt to the loaded / running - * transfers. Since we don't have any way of knowing exactly the state of - * the DMA transfers, we need to know the state to make decisions on wether - * we can - * - * S3C2410_DMA_NONE - * - * There are no buffers loaded (the channel should be inactive) - * - * S3C2410_DMA_1LOADED - * - * There is one buffer loaded, however it has not been confirmed to be - * loaded by the DMA engine. This may be because the channel is not - * yet running, or the DMA driver decided that it was too costly to - * sit and wait for it to happen. - * - * S3C2410_DMA_1RUNNING - * - * The buffer has been confirmed running, and not finisged - * - * S3C2410_DMA_1LOADED_1RUNNING - * - * There is a buffer waiting to be loaded by the DMA engine, and one - * currently running. -*/ - -typedef enum { - S3C2410_DMALOAD_NONE, - S3C2410_DMALOAD_1LOADED, - S3C2410_DMALOAD_1RUNNING, - S3C2410_DMALOAD_1LOADED_1RUNNING, -} s3c2410_dma_loadst_t; - -typedef enum { - S3C2410_RES_OK, - S3C2410_RES_ERR, - S3C2410_RES_ABORT -} s3c2410_dma_buffresult_t; - - -typedef enum s3c2410_dmasrc_e s3c2410_dmasrc_t; - -enum s3c2410_dmasrc_e { - S3C2410_DMASRC_HW, /* source is memory */ - S3C2410_DMASRC_MEM /* source is hardware */ -}; - -/* enum s3c2410_chan_op_e - * - * operation codes passed to the DMA code by the user, and also used - * to inform the current channel owner of any changes to the system state -*/ - -enum s3c2410_chan_op_e { - S3C2410_DMAOP_START, - S3C2410_DMAOP_STOP, - S3C2410_DMAOP_PAUSE, - S3C2410_DMAOP_RESUME, - S3C2410_DMAOP_FLUSH, - S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */ -}; - -typedef enum s3c2410_chan_op_e s3c2410_chan_op_t; - -/* flags */ - -#define S3C2410_DMAF_SLOW (1<<0) /* slow, so don't worry about - * waiting for reloads */ -#define S3C2410_DMAF_AUTOSTART (1<<1) /* auto-start if buffer queued */ - -/* dma buffer */ - -typedef struct s3c2410_dma_buf_s s3c2410_dma_buf_t; - -struct s3c2410_dma_client { - char *name; -}; - -typedef struct s3c2410_dma_client s3c2410_dma_client_t; - -/* s3c2410_dma_buf_s - * - * internally used buffer structure to describe a queued or running - * buffer. -*/ - -struct s3c2410_dma_buf_s { - s3c2410_dma_buf_t *next; - int magic; /* magic */ - int size; /* buffer size in bytes */ - dma_addr_t data; /* start of DMA data */ - dma_addr_t ptr; /* where the DMA got to [1] */ - void *id; /* client's id */ -}; - -/* [1] is this updated for both recv/send modes? */ - -typedef struct s3c2410_dma_chan_s s3c2410_dma_chan_t; - -/* s3c2410_dma_cbfn_t - * - * buffer callback routine type -*/ - -typedef void (*s3c2410_dma_cbfn_t)(s3c2410_dma_chan_t *, void *buf, int size, - s3c2410_dma_buffresult_t result); - -typedef int (*s3c2410_dma_opfn_t)(s3c2410_dma_chan_t *, - s3c2410_chan_op_t ); - -struct s3c2410_dma_stats_s { - unsigned long loads; - unsigned long timeout_longest; - unsigned long timeout_shortest; - unsigned long timeout_avg; - unsigned long timeout_failed; -}; - -typedef struct s3c2410_dma_stats_s s3c2410_dma_stats_t; - -/* struct s3c2410_dma_chan_s - * - * full state information for each DMA channel -*/ - -struct s3c2410_dma_chan_s { - /* channel state flags and information */ - unsigned char number; /* number of this dma channel */ - unsigned char in_use; /* channel allocated */ - unsigned char irq_claimed; /* irq claimed for channel */ - unsigned char irq_enabled; /* irq enabled for channel */ - unsigned char xfer_unit; /* size of an transfer */ - - /* channel state */ - - s3c2410_dma_state_t state; - s3c2410_dma_loadst_t load_state; - s3c2410_dma_client_t *client; - - /* channel configuration */ - s3c2410_dmasrc_t source; - unsigned long dev_addr; - unsigned long load_timeout; - unsigned int flags; /* channel flags */ - - /* channel's hardware position and configuration */ - unsigned long regs; /* channels registers */ - unsigned int irq; /* channel irq */ - unsigned long addr_reg; /* data address register */ - unsigned long dcon; /* default value of DCON */ - - /* driver handles */ - s3c2410_dma_cbfn_t callback_fn; /* buffer done callback */ - s3c2410_dma_opfn_t op_fn; /* channel operation callback */ - - /* stats gathering */ - s3c2410_dma_stats_t *stats; - s3c2410_dma_stats_t stats_store; - - /* buffer list and information */ - s3c2410_dma_buf_t *curr; /* current dma buffer */ - s3c2410_dma_buf_t *next; /* next buffer to load */ - s3c2410_dma_buf_t *end; /* end of queue */ -}; - -/* the currently allocated channel information */ -extern s3c2410_dma_chan_t s3c2410_chans[]; - -/* note, we don't really use dma_device_t at the moment */ -typedef unsigned long dma_device_t; - -/* functions --------------------------------------------------------------- */ - -/* s3c2410_dma_request - * - * request a dma channel exclusivley -*/ - -extern int s3c2410_dma_request(dmach_t channel, - s3c2410_dma_client_t *, void *dev); - - -/* s3c2410_dma_ctrl - * - * change the state of the dma channel -*/ - -extern int s3c2410_dma_ctrl(dmach_t channel, s3c2410_chan_op_t op); - -/* s3c2410_dma_setflags - * - * set the channel's flags to a given state -*/ - -extern int s3c2410_dma_setflags(dmach_t channel, - unsigned int flags); - -/* s3c2410_dma_free - * - * free the dma channel (will also abort any outstanding operations) -*/ - -extern int s3c2410_dma_free(dmach_t channel, s3c2410_dma_client_t *); - -/* s3c2410_dma_enqueue - * - * place the given buffer onto the queue of operations for the channel. - * The buffer must be allocated from dma coherent memory, or the Dcache/WB - * drained before the buffer is given to the DMA system. -*/ - -extern int s3c2410_dma_enqueue(dmach_t channel, void *id, - dma_addr_t data, int size); - -/* s3c2410_dma_config - * - * configure the dma channel -*/ - -extern int s3c2410_dma_config(dmach_t channel, int xferunit, int dcon); - -/* s3c2410_dma_devconfig - * - * configure the device we're talking to -*/ - -extern int s3c2410_dma_devconfig(int channel, s3c2410_dmasrc_t source, - int hwcfg, unsigned long devaddr); - -extern int s3c2410_dma_set_opfn(dmach_t, s3c2410_dma_opfn_t rtn); -extern int s3c2410_dma_set_buffdone_fn(dmach_t, s3c2410_dma_cbfn_t rtn); - -/* DMA Register definitions */ - -#define S3C2410_DMA_DISRC (0x00) -#define S3C2410_DMA_DISRCC (0x04) -#define S3C2410_DMA_DIDST (0x08) -#define S3C2410_DMA_DIDSTC (0x0C) -#define S3C2410_DMA_DCON (0x10) -#define S3C2410_DMA_DSTAT (0x14) -#define S3C2410_DMA_DCSRC (0x18) -#define S3C2410_DMA_DCDST (0x1C) -#define S3C2410_DMA_DMASKTRIG (0x20) - -#define S3C2410_DMASKTRIG_STOP (1<<2) -#define S3C2410_DMASKTRIG_ON (1<<1) -#define S3C2410_DMASKTRIG_SWTRIG (1<<0) - -#define S3C2410_DCOM_DEMAND (0<<31) -#define S3C2410_DCON_HANDSHAKE (1<<31) -#define S3C2410_DCON_SYNC_PCLK (0<<30) -#define S3C2410_DCON_SYNC_HCLK (1<<30) - -#define S3C2410_DCON_INTREQ (1<<29) - -#define S3C2410_DCON_SRCSHIFT (24) - -#define S3C2410_DCON_BYTE (0<<20) -#define S3C2410_DCON_HALFWORD (1<<20) -#define S3C2410_DCON_WORD (2<<20) - -#define S3C2410_DCON_AUTORELOAD (0<<22) -#define S3C2410_DCON_NORELOAD (1<<22) -#define S3C2410_DCON_HWTRIG (1<<23) - -#endif /* __ASM_ARCH_DMA_H */ diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/include/asm-arm/arch/hardware.h linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/hardware.h --- linux-2.6.10-rc1-bk2/include/asm-arm/arch/hardware.h 2004-10-25 09:53:38.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/hardware.h 1970-01-01 01:00:00.000000000 +0100 @@ -1,109 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/hardware.h - * - * (c) 2003 Simtec Electronics - * Ben Dooks - * - * S3C2410 - hardware - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 21-May-2003 BJD Created file - * 06-Jun-2003 BJD Added CPU frequency settings - * 03-Sep-2003 BJD Linux v2.6 support - * 12-Mar-2004 BJD Fixed include protection, fixed type of clock vars - * 14-Sep-2004 BJD Added misccr and getpin to gpio - * 01-Oct-2004 BJD Added the new gpio functions - * 16-Oct-2004 BJD Removed the clock variables -*/ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#ifndef __ASSEMBLY__ - -/* external functions for GPIO support - * - * These allow various different clients to access the same GPIO - * registers without conflicting. If your driver only owns the entire - * GPIO register, then it is safe to ioremap/__raw_{read|write} to it. -*/ - -/* s3c2410_gpio_cfgpin - * - * set the configuration of the given pin to the value passed. - * - * eg: - * s3c2410_gpio_cfgpin(S3C2410_GPA0, S3C2410_GPA0_ADDR0); - * s3c2410_gpio_cfgpin(S3C2410_GPE8, S3C2410_GPE8_SDDAT1); -*/ - -extern void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function); - -extern unsigned int s3c2410_gpio_getcfg(unsigned int pin); - -/* s3c2410_gpio_getirq - * - * turn the given pin number into the corresponding IRQ number - * - * returns: - * < 0 = no interrupt for this pin - * >=0 = interrupt number for the pin -*/ - -extern int s3c2410_gpio_getirq(unsigned int pin); - -/* s3c2410_gpio_irqfilter - * - * set the irq filtering on the given pin - * - * on = 0 => disable filtering - * 1 => enable filtering - * - * config = S3C2410_EINTFLT_PCLK or S3C2410_EINTFLT_EXTCLK orred with - * width of filter (0 through 63) - * - * -*/ - -extern int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on, - unsigned int config); - -/* s3c2410_gpio_pullup - * - * configure the pull-up control on the given pin - * - * to = 1 => disable the pull-up - * 0 => enable the pull-up - * - * eg; - * - * s3c2410_gpio_pullup(S3C2410_GPB0, 0); - * s3c2410_gpio_pullup(S3C2410_GPE8, 0); -*/ - -extern void s3c2410_gpio_pullup(unsigned int pin, unsigned int to); - -extern void s3c2410_gpio_setpin(unsigned int pin, unsigned int to); - -extern unsigned int s3c2410_gpio_getpin(unsigned int pin); - -extern unsigned int s3c2410_modify_misccr(unsigned int clr, unsigned int chg); - -#endif /* __ASSEMBLY__ */ - -#include -#include - -/* machine specific includes, such as the BAST */ - -#if defined(CONFIG_ARCH_BAST) -#include -#endif - -/* currently here until moved into config (todo) */ -#define CONFIG_NO_MULTIWORD_IO - -#endif /* __ASM_ARCH_HARDWARE_H */ diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/include/asm-arm/arch/io.h linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/io.h --- linux-2.6.10-rc1-bk2/include/asm-arm/arch/io.h 2004-10-18 22:55:06.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/io.h 1970-01-01 01:00:00.000000000 +0100 @@ -1,198 +0,0 @@ -/* - * linux/include/asm-arm/arch-s3c2410/io.h - * from linux/include/asm-arm/arch-rpc/io.h - * - * Copyright (C) 1997 Russell King - * (C) 2003 Simtec Electronics - * - * Modifications: - * 06-Dec-1997 RMK Created. - * 02-Sep-2003 BJD Modified for S3C2410 - * - */ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * We use two different types of addressing - PC style addresses, and ARM - * addresses. PC style accesses the PC hardware with the normal PC IO - * addresses, eg 0x3f8 for serial#1. ARM addresses are above A28 - * and are translated to the start of IO. Note that all addresses are - * not shifted left! - */ - -#define __PORT_PCIO(x) ((x) < (1<<28)) - -#define PCIO_BASE (S3C2410_VA_ISA_WORD) -#define PCIO_BASE_b (S3C2410_VA_ISA_BYTE) -#define PCIO_BASE_w (S3C2410_VA_ISA_WORD) -#define PCIO_BASE_l (S3C2410_VA_ISA_WORD) -/* - * Dynamic IO functions - let the compiler - * optimize the expressions - */ - -#define DECLARE_DYN_OUT(sz,fnsuffix,instr) \ -static inline void __out##fnsuffix (unsigned int val, unsigned int port) \ -{ \ - unsigned long temp; \ - __asm__ __volatile__( \ - "cmp %2, #(1<<28)\n\t" \ - "mov %0, %2\n\t" \ - "addcc %0, %0, %3\n\t" \ - "str" instr " %1, [%0, #0 ] @ out" #fnsuffix \ - : "=&r" (temp) \ - : "r" (val), "r" (port), "Ir" (PCIO_BASE_##fnsuffix) \ - : "cc"); \ -} - - -#define DECLARE_DYN_IN(sz,fnsuffix,instr) \ -static inline unsigned sz __in##fnsuffix (unsigned int port) \ -{ \ - unsigned long temp, value; \ - __asm__ __volatile__( \ - "cmp %2, #(1<<28)\n\t" \ - "mov %0, %2\n\t" \ - "addcc %0, %0, %3\n\t" \ - "ldr" instr " %1, [%0, #0 ] @ in" #fnsuffix \ - : "=&r" (temp), "=r" (value) \ - : "r" (port), "Ir" (PCIO_BASE_##fnsuffix) \ - : "cc"); \ - return (unsigned sz)value; \ -} - -static inline unsigned int __ioaddr (unsigned int port) -{ - if (__PORT_PCIO(port)) - return (unsigned int)(PCIO_BASE + (port)); - else - return (unsigned int)(0 + (port)); -} - -#define DECLARE_IO(sz,fnsuffix,instr) \ - DECLARE_DYN_IN(sz,fnsuffix,instr) \ - DECLARE_DYN_OUT(sz,fnsuffix,instr) - -DECLARE_IO(char,b,"b") -DECLARE_IO(short,w,"h") -DECLARE_IO(int,l,"") - -#undef DECLARE_IO -#undef DECLARE_DYN_IN - -/* - * Constant address IO functions - * - * These have to be macros for the 'J' constraint to work - - * +/-4096 immediate operand. - */ -#define __outbc(value,port) \ -({ \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "strb %0, [%1, %2] @ outbc" \ - : : "r" (value), "r" (PCIO_BASE), "Jr" ((port))); \ - else \ - __asm__ __volatile__( \ - "strb %0, [%1, #0] @ outbc" \ - : : "r" (value), "r" ((port))); \ -}) - -#define __inbc(port) \ -({ \ - unsigned char result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldrb %0, [%1, %2] @ inbc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port))); \ - else \ - __asm__ __volatile__( \ - "ldrb %0, [%1, #0] @ inbc" \ - : "=r" (result) : "r" ((port))); \ - result; \ -}) - -#define __outwc(value,port) \ -({ \ - unsigned long v = value; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "strh %0, [%1, %2] @ outwc" \ - : : "r" (v), "r" (PCIO_BASE), "Jr" ((port))); \ - else \ - __asm__ __volatile__( \ - "strh %0, [%1, #0] @ outwc" \ - : : "r" (v), "r" ((port))); \ -}) - -#define __inwc(port) \ -({ \ - unsigned short result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldrh %0, [%1, %2] @ inwc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port))); \ - else \ - __asm__ __volatile__( \ - "ldrh %0, [%1, #0] @ inwc" \ - : "=r" (result) : "r" ((port))); \ - result; \ -}) - -#define __outlc(value,port) \ -({ \ - unsigned long v = value; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outlc" \ - : : "r" (v), "r" (PCIO_BASE), "Jr" ((port))); \ - else \ - __asm__ __volatile__( \ - "str %0, [%1, #0] @ outlc" \ - : : "r" (v), "r" ((port))); \ -}) - -#define __inlc(port) \ -({ \ - unsigned long result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inlc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port))); \ - else \ - __asm__ __volatile__( \ - "ldr %0, [%1, #0] @ inlc" \ - : "=r" (result) : "r" ((port))); \ - result; \ -}) - -#define __ioaddrc(port) (__PORT_PCIO((port)) ? PCIO_BASE + ((port)) : ((port))) - -#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p)) -#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p)) -#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p)) -#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p)) -#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) -#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) -#define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p)) -/* the following macro is deprecated */ -#define ioaddr(port) __ioaddr((port)) - -#define insb(p,d,l) __raw_readsb(__ioaddr(p),d,l) -#define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l) -#define insl(p,d,l) __raw_readsl(__ioaddr(p),d,l) - -#define outsb(p,d,l) __raw_writesb(__ioaddr(p),d,l) -#define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l) -#define outsl(p,d,l) __raw_writesl(__ioaddr(p),d,l) - -/* - * 1:1 mapping for ioremapped regions. - */ -#define __mem_pci(x) (x) - -#endif diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/include/asm-arm/arch/irqs.h linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/irqs.h --- linux-2.6.10-rc1-bk2/include/asm-arm/arch/irqs.h 2004-10-18 22:53:10.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/irqs.h 1970-01-01 01:00:00.000000000 +0100 @@ -1,115 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/irqs.h - * - * Copyright (c) 2003 Simtec Electronics - * Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 12-May-2003 BJD Created file - * 08-Jan-2003 BJD Linux 2.6.0 version, moved BAST bits out - * 12-Mar-2004 BJD Fixed bug in header protection - */ - - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H __FILE__ - - -/* we keep the first set of CPU IRQs out of the range of - * the ISA space, so that the PC104 has them to itself - * and we don't end up having to do horrible things to the - * standard ISA drivers.... - */ - -#define S3C2410_CPUIRQ_OFFSET (16) - -#define S3C2410_IRQ(x) ((x) + S3C2410_CPUIRQ_OFFSET) - -/* main cpu interrupts */ -#define IRQ_EINT0 S3C2410_IRQ(0) /* 16 */ -#define IRQ_EINT1 S3C2410_IRQ(1) -#define IRQ_EINT2 S3C2410_IRQ(2) -#define IRQ_EINT3 S3C2410_IRQ(3) -#define IRQ_EINT4t7 S3C2410_IRQ(4) /* 20 */ -#define IRQ_EINT8t23 S3C2410_IRQ(5) -#define IRQ_RESERVED6 S3C2410_IRQ(6) -#define IRQ_BATT_FLT S3C2410_IRQ(7) -#define IRQ_TICK S3C2410_IRQ(8) /* 24 */ -#define IRQ_WDT S3C2410_IRQ(9) -#define IRQ_TIMER0 S3C2410_IRQ(10) -#define IRQ_TIMER1 S3C2410_IRQ(11) -#define IRQ_TIMER2 S3C2410_IRQ(12) -#define IRQ_TIMER3 S3C2410_IRQ(13) -#define IRQ_TIMER4 S3C2410_IRQ(14) -#define IRQ_UART2 S3C2410_IRQ(15) -#define IRQ_LCD S3C2410_IRQ(16) /* 32 */ -#define IRQ_DMA0 S3C2410_IRQ(17) -#define IRQ_DMA1 S3C2410_IRQ(18) -#define IRQ_DMA2 S3C2410_IRQ(19) -#define IRQ_DMA3 S3C2410_IRQ(20) -#define IRQ_SDI S3C2410_IRQ(21) -#define IRQ_SPI0 S3C2410_IRQ(22) -#define IRQ_UART1 S3C2410_IRQ(23) -#define IRQ_RESERVED24 S3C2410_IRQ(24) /* 40 */ -#define IRQ_USBD S3C2410_IRQ(25) -#define IRQ_USBH S3C2410_IRQ(26) -#define IRQ_IIC S3C2410_IRQ(27) -#define IRQ_UART0 S3C2410_IRQ(28) /* 44 */ -#define IRQ_SPI1 S3C2410_IRQ(29) -#define IRQ_RTC S3C2410_IRQ(30) -#define IRQ_ADCPARENT S3C2410_IRQ(31) - -/* interrupts generated from the external interrupts sources */ -#define IRQ_EINT4 S3C2410_IRQ(32) /* 48 */ -#define IRQ_EINT5 S3C2410_IRQ(33) -#define IRQ_EINT6 S3C2410_IRQ(34) -#define IRQ_EINT7 S3C2410_IRQ(35) -#define IRQ_EINT8 S3C2410_IRQ(36) -#define IRQ_EINT9 S3C2410_IRQ(37) -#define IRQ_EINT10 S3C2410_IRQ(38) -#define IRQ_EINT11 S3C2410_IRQ(39) -#define IRQ_EINT12 S3C2410_IRQ(40) -#define IRQ_EINT13 S3C2410_IRQ(41) -#define IRQ_EINT14 S3C2410_IRQ(42) -#define IRQ_EINT15 S3C2410_IRQ(43) -#define IRQ_EINT16 S3C2410_IRQ(44) -#define IRQ_EINT17 S3C2410_IRQ(45) -#define IRQ_EINT18 S3C2410_IRQ(46) -#define IRQ_EINT19 S3C2410_IRQ(47) -#define IRQ_EINT20 S3C2410_IRQ(48) /* 64 */ -#define IRQ_EINT21 S3C2410_IRQ(49) -#define IRQ_EINT22 S3C2410_IRQ(50) -#define IRQ_EINT23 S3C2410_IRQ(51) - - -#define IRQ_EINT(x) S3C2410_IRQ((x >= 4) ? (IRQ_EINT4 + (x) - 4) : (S3C2410_IRQ(0) + (x))) - -#define IRQ_LCD_FIFO S3C2410_IRQ(52) -#define IRQ_LCD_FRAME S3C2410_IRQ(53) - -/* IRQs for the interal UARTs, and ADC - * these need to be ordered in number of appearance in the - * SUBSRC mask register -*/ -#define IRQ_S3CUART_RX0 S3C2410_IRQ(54) /* 70 */ -#define IRQ_S3CUART_TX0 S3C2410_IRQ(55) /* 71 */ -#define IRQ_S3CUART_ERR0 S3C2410_IRQ(56) - -#define IRQ_S3CUART_RX1 S3C2410_IRQ(57) -#define IRQ_S3CUART_TX1 S3C2410_IRQ(58) -#define IRQ_S3CUART_ERR1 S3C2410_IRQ(59) - -#define IRQ_S3CUART_RX2 S3C2410_IRQ(60) -#define IRQ_S3CUART_TX2 S3C2410_IRQ(61) -#define IRQ_S3CUART_ERR2 S3C2410_IRQ(62) - -#define IRQ_TC S3C2410_IRQ(63) -#define IRQ_ADC S3C2410_IRQ(64) - -#define NR_IRQS (IRQ_ADC+1) - - -#endif /* __ASM_ARCH_IRQ_H */ diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/include/asm-arm/arch/map.h linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/map.h --- linux-2.6.10-rc1-bk2/include/asm-arm/arch/map.h 2004-10-18 22:55:06.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/map.h 1970-01-01 01:00:00.000000000 +0100 @@ -1,148 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/map.h - * - * (c) 2003 Simtec Electronics - * Ben Dooks - * - * S3C2410 - Memory map definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 12-May-2003 BJD Created file - * 06-Jan-2003 BJD Linux 2.6.0 version, moved bast specifics out -*/ - -#ifndef __ASM_ARCH_MAP_H -#define __ASM_ARCH_MAP_H - -/* we have a bit of a tight squeeze to fit all our registers from - * 0xF00000000 upwards, since we use all of the nGCS space in some - * capacity, and also need to fit the S3C2410 registers in as well... - * - * we try to ensure stuff like the IRQ registers are available for - * an single MOVS instruction (ie, only 8 bits of set data) - * - * Note, we are trying to remove some of these from the implementation - * as they are only useful to certain drivers... - */ - -#define S3C2410_ADDR(x) (0xF0000000 + (x)) - -/* interrupt controller is the first thing we put in, to make - * the assembly code for the irq detection easier - */ -#define S3C2410_VA_IRQ S3C2410_ADDR(0x00000000) -#define S3C2410_PA_IRQ (0x4A000000) -#define S3C2410_SZ_IRQ SZ_1M - -/* memory controller registers */ -#define S3C2410_VA_MEMCTRL S3C2410_ADDR(0x00100000) -#define S3C2410_PA_MEMCTRL (0x48000000) -#define S3C2410_SZ_MEMCTRL SZ_1M - -/* USB host controller */ -#define S3C2410_VA_USBHOST S3C2410_ADDR(0x00200000) -#define S3C2410_PA_USBHOST (0x49000000) -#define S3C2410_SZ_USBHOST SZ_1M - -/* DMA controller */ -#define S3C2410_VA_DMA S3C2410_ADDR(0x00300000) -#define S3C2410_PA_DMA (0x4B000000) -#define S3C2410_SZ_DMA SZ_1M - -/* Clock and Power management */ -#define S3C2410_VA_CLKPWR S3C2410_ADDR(0x00400000) -#define S3C2410_PA_CLKPWR (0x4C000000) -#define S3C2410_SZ_CLKPWR SZ_1M - -/* LCD controller */ -#define S3C2410_VA_LCD S3C2410_ADDR(0x00600000) -#define S3C2410_PA_LCD (0x4D000000) -#define S3C2410_SZ_LCD SZ_1M - -/* NAND flash controller */ -#define S3C2410_VA_NAND S3C2410_ADDR(0x00700000) -#define S3C2410_PA_NAND (0x4E000000) -#define S3C2410_SZ_NAND SZ_1M - -/* UARTs */ -#define S3C2410_VA_UART S3C2410_ADDR(0x00800000) -#define S3C2410_PA_UART (0x50000000) -#define S3C2410_SZ_UART SZ_1M - -/* Timers */ -#define S3C2410_VA_TIMER S3C2410_ADDR(0x00900000) -#define S3C2410_PA_TIMER (0x51000000) -#define S3C2410_SZ_TIMER SZ_1M - -/* USB Device port */ -#define S3C2410_VA_USBDEV S3C2410_ADDR(0x00A00000) -#define S3C2410_PA_USBDEV (0x52000000) -#define S3C2410_SZ_USBDEV SZ_1M - -/* Watchdog */ -#define S3C2410_VA_WATCHDOG S3C2410_ADDR(0x00B00000) -#define S3C2410_PA_WATCHDOG (0x53000000) -#define S3C2410_SZ_WATCHDOG SZ_1M - -/* IIC hardware controller */ -#define S3C2410_VA_IIC S3C2410_ADDR(0x00C00000) -#define S3C2410_PA_IIC (0x54000000) -#define S3C2410_SZ_IIC SZ_1M - -#define VA_IIC_BASE (S3C2410_VA_IIC) - -/* IIS controller */ -#define S3C2410_VA_IIS S3C2410_ADDR(0x00D00000) -#define S3C2410_PA_IIS (0x55000000) -#define S3C2410_SZ_IIS SZ_1M - -/* GPIO ports */ -#define S3C2410_VA_GPIO S3C2410_ADDR(0x00E00000) -#define S3C2410_PA_GPIO (0x56000000) -#define S3C2410_SZ_GPIO SZ_1M - -/* RTC */ -#define S3C2410_VA_RTC S3C2410_ADDR(0x00F00000) -#define S3C2410_PA_RTC (0x57000000) -#define S3C2410_SZ_RTC SZ_1M - -/* ADC */ -#define S3C2410_VA_ADC S3C2410_ADDR(0x01000000) -#define S3C2410_PA_ADC (0x58000000) -#define S3C2410_SZ_ADC SZ_1M - -/* SPI */ -#define S3C2410_VA_SPI S3C2410_ADDR(0x01100000) -#define S3C2410_PA_SPI (0x59000000) -#define S3C2410_SZ_SPI SZ_1M - -/* SDI */ -#define S3C2410_VA_SDI S3C2410_ADDR(0x01200000) -#define S3C2410_PA_SDI (0x5A000000) -#define S3C2410_SZ_SDI SZ_1M - -/* ISA style IO, for each machine to sort out mappings for, if it - * implements it. We reserve two 16M regions for ISA. - */ - -#define S3C2410_VA_ISA_WORD S3C2410_ADDR(0x02000000) -#define S3C2410_VA_ISA_BYTE S3C2410_ADDR(0x03000000) - -/* physical addresses of all the chip-select areas */ - -#define S3C2410_CS0 (0x00000000) -#define S3C2410_CS1 (0x08000000) -#define S3C2410_CS2 (0x10000000) -#define S3C2410_CS3 (0x18000000) -#define S3C2410_CS4 (0x20000000) -#define S3C2410_CS5 (0x28000000) -#define S3C2410_CS6 (0x30000000) -#define S3C2410_CS7 (0x38000000) - -#define S3C2410_SDRAM_PA (S3C2410_CS6) - - -#endif /* __ASM_ARCH_MAP_H */ diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/include/asm-arm/arch/memory.h linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/memory.h --- linux-2.6.10-rc1-bk2/include/asm-arm/arch/memory.h 2004-10-18 22:54:55.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/memory.h 1970-01-01 01:00:00.000000000 +0100 @@ -1,38 +0,0 @@ -/* - * linux/include/asm-arm/arch-s3c2410/memory.h - * - * from linux/include/asm-arm/arch-rpc/memory.h - * - * Copyright (C) 1996,1997,1998 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 20-Oct-1996 RMK Created - * 31-Dec-1997 RMK Fixed definitions to reduce warnings - * 11-Jan-1998 RMK Uninlined to reduce hits on cache - * 08-Feb-1998 RMK Added __virt_to_bus and __bus_to_virt - * 21-Mar-1999 RMK Renamed to memory.h - * RMK Added TASK_SIZE and PAGE_OFFSET - * 05-Apr-2004 BJD Copied and altered for arch-s3c2410 -*/ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * DRAM starts at 0x30000000 - */ -#define PHYS_OFFSET (0x30000000UL) - -/* - * These are exactly the same on the S3C2410 as the - * physical memory view. -*/ - -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - -#endif diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/include/asm-arm/arch/nand.h linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/nand.h --- linux-2.6.10-rc1-bk2/include/asm-arm/arch/nand.h 2004-10-18 22:55:36.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/nand.h 1970-01-01 01:00:00.000000000 +0100 @@ -1,48 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/nand.h - * - * (c) 2004 Simtec Electronics - * Ben Dooks - * - * S3C2410 - NAND device controller platfrom_device info - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 23-Sep-2004 BJD Created file -*/ - -/* struct s3c2410_nand_set - * - * define an set of one or more nand chips registered with an unique mtd - * - * nr_chips = number of chips in this set - * nr_partitions = number of partitions pointed to be partitoons (or zero) - * name = name of set (optional) - * nr_map = map for low-layer logical to physical chip numbers (option) - * partitions = mtd partition list -*/ - -struct s3c2410_nand_set { - int nr_chips; - int nr_partitions; - char *name; - int *nr_map; - struct mtd_partition *partitions; -}; - -struct s3c2410_platform_nand { - /* timing information for controller, all times in nanoseconds */ - - int tacls; /* time for active CLE/ALE to nWE/nOE */ - int twrph0; /* active time for nWE/nOE */ - int twrph1; /* time for release CLE/ALE from nWE/nOE inactive */ - - int nr_sets; - struct s3c2410_nand_set *sets; - - void (*select_chip)(struct s3c2410_nand_set *, - int chip); -}; - diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/include/asm-arm/arch/param.h linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/param.h --- linux-2.6.10-rc1-bk2/include/asm-arm/arch/param.h 2004-10-18 22:55:28.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/param.h 1970-01-01 01:00:00.000000000 +0100 @@ -1,27 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/param.h - * - * (c) 2003 Simtec Electronics - * Ben Dooks - * - * S3C2410 - Machine parameters - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 02-Sep-2003 BJD Created file - * 12-Mar-2004 BJD Added include protection -*/ - -#ifndef __ASM_ARCH_PARAM_H -#define __ASM_ARCH_PARAM_H - -/* we cannot get our timer down to 100Hz with the setup as is, but we can - * manage 200 clock ticks per second... if this is a problem, we can always - * add a software pre-scaler to the evil timer systems. -*/ - -#define HZ 200 - -#endif /* __ASM_ARCH_PARAM_H */ diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/include/asm-arm/arch/regs-clock.h linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/regs-clock.h --- linux-2.6.10-rc1-bk2/include/asm-arm/arch/regs-clock.h 2004-10-18 22:53:07.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/regs-clock.h 1970-01-01 01:00:00.000000000 +0100 @@ -1,120 +0,0 @@ -/* linux/include/asm/arch-s3c2410/regs-clock.h - * - * Copyright (c) 2003,2004 Simtec Electronics - * http://www.simtec.co.uk/products/SWLINUX/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2410 clock register definitions - * - * Changelog: - * 18-Aug-2004 Ben Dooks Added 2440 definitions - * 08-Aug-2004 Herbert Pötzl Added CLKCON definitions - * 19-06-2003 Ben Dooks Created file - * 12-03-2004 Ben Dooks Updated include protection - * 29-Sep-2004 Ben Dooks Fixed usage for assembly inclusion - */ - -#ifndef __ASM_ARM_REGS_CLOCK -#define __ASM_ARM_REGS_CLOCK "$Id: clock.h,v 1.4 2003/04/30 14:50:51 ben Exp $" - -#define S3C2410_CLKREG(x) ((x) + S3C2410_VA_CLKPWR) - -#define S3C2410_PLLVAL(_m,_p,_s) ((_m) << 12 | ((_p) << 4) | ((_s))) - -#define S3C2410_LOCKTIME S3C2410_CLKREG(0x00) -#define S3C2410_MPLLCON S3C2410_CLKREG(0x04) -#define S3C2410_UPLLCON S3C2410_CLKREG(0x08) -#define S3C2410_CLKCON S3C2410_CLKREG(0x0C) -#define S3C2410_CLKSLOW S3C2410_CLKREG(0x10) -#define S3C2410_CLKDIVN S3C2410_CLKREG(0x14) - -#define S3C2410_CLKCON_IDLE (1<<2) -#define S3C2410_CLKCON_POWER (1<<3) -#define S3C2410_CLKCON_NAND (1<<4) -#define S3C2410_CLKCON_LCDC (1<<5) -#define S3C2410_CLKCON_USBH (1<<6) -#define S3C2410_CLKCON_USBD (1<<7) -#define S3C2410_CLKCON_PWMT (1<<8) -#define S3C2410_CLKCON_SDI (1<<9) -#define S3C2410_CLKCON_UART0 (1<<10) -#define S3C2410_CLKCON_UART1 (1<<11) -#define S3C2410_CLKCON_UART2 (1<<12) -#define S3C2410_CLKCON_GPIO (1<<13) -#define S3C2410_CLKCON_RTC (1<<14) -#define S3C2410_CLKCON_ADC (1<<15) -#define S3C2410_CLKCON_IIC (1<<16) -#define S3C2410_CLKCON_IIS (1<<17) -#define S3C2410_CLKCON_SPI (1<<18) - -#define S3C2410_PLLCON_MDIVSHIFT 12 -#define S3C2410_PLLCON_PDIVSHIFT 4 -#define S3C2410_PLLCON_SDIVSHIFT 0 -#define S3C2410_PLLCON_MDIVMASK ((1<<(1+(19-12)))-1) -#define S3C2410_PLLCON_PDIVMASK ((1<<5)-1) -#define S3C2410_PLLCON_SDIVMASK 3 - -/* DCLKCON register addresses in gpio.h */ - -#define S3C2410_DCLKCON_DCLK0EN (1<<0) -#define S3C2410_DCLKCON_DCLK0_PCLK (0<<1) -#define S3C2410_DCLKCON_DCLK0_UCLK (1<<1) -#define S3C2410_DCLKCON_DCLK0_DIV(x) (((x) - 1 )<<4) -#define S3C2410_DCLKCON_DCLK0_CMP(x) (((x) - 1 )<<8) - -#define S3C2410_DCLKCON_DCLK1EN (1<<16) -#define S3C2410_DCLKCON_DCLK1_PCLK (0<<17) -#define S3C2410_DCLKCON_DCLK1_UCLK (1<<17) -#define S3C2410_DCLKCON_DCLK1_DIV(x) (((x) - 1) <<20) - -#define S3C2410_CLKDIVN_PDIVN (1<<0) -#define S3C2410_CLKDIVN_HDIVN (1<<1) - -#ifndef __ASSEMBLY__ - -static inline unsigned int -s3c2410_get_pll(int pllval, int baseclk) -{ - int mdiv, pdiv, sdiv; - - mdiv = pllval >> S3C2410_PLLCON_MDIVSHIFT; - pdiv = pllval >> S3C2410_PLLCON_PDIVSHIFT; - sdiv = pllval >> S3C2410_PLLCON_SDIVSHIFT; - - mdiv &= S3C2410_PLLCON_MDIVMASK; - pdiv &= S3C2410_PLLCON_PDIVMASK; - sdiv &= S3C2410_PLLCON_SDIVMASK; - - return (baseclk * (mdiv + 8)) / ((pdiv + 2) << sdiv); -} - -#endif /* __ASSEMBLY__ */ - -#ifdef CONFIG_CPU_S3C2440 - -/* extra registers */ -#define S3C2440_CAMDIVN S3C2410_CLKREG(0x14) - -#define S3C2440_CLKCON_CAMERA (1<<19) -#define S3C2440_CLKCON_AC97 (1<<20) - -#define S3C2440_CLKDIVN_PDIVN (1<<0) -#define S3C2440_CLKDIVN_HDIVN_MASK (3<<1) -#define S3C2440_CLKDIVN_HDIVN_1 (0<<1) -#define S3C2440_CLKDIVN_HDIVN_2 (1<<1) -#define S3C2440_CLKDIVN_HDIVN_4_8 (2<<1) -#define S3C2440_CLKDIVN_HDIVN_3_6 (3<<1) -#define S3C2440_CLKDIVN_UCLK (1<<3) - -#define S3C2440_CAMDIVN_CAMCLK_MASK (0xf<<0) -#define S3C2440_CAMDIVN_CAMCLK_SEL (1<<4) -#define S3C2440_CAMDIVN_HCLK3_HALF (1<<8) -#define S3C2440_CAMDIVN_HCLK4_HALF (1<<9) -#define S3C2440_CAMDIVN_DVSEN (1<<12) - -#endif /* CONFIG_CPU_S3C2440 */ - - -#endif /* __ASM_ARM_REGS_CLOCK */ diff -urN -X ../dontdiff linux-2.6.10-rc1-bk2/include/asm-arm/arch/regs-dsc.h linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/regs-dsc.h --- linux-2.6.10-rc1-bk2/include/asm-arm/arch/regs-dsc.h 2004-10-18 22:53:45.000000000 +0100 +++ linux-2.6.10-rc1-bk2-set2/include/asm-arm/arch/regs-dsc.h 1970-01-01 01:00:00.000000000 +0100 @@ -1,183 +0,0 @@ -/* linux/include/asm/hardware/s3c2410/regs-dsc.h - * - * Copyright (c) 2004 Simtec Electronics - * http://www.simtec.co.uk/products/SWLINUX/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2440 Signal Drive Strength Control - * - * Changelog: - * 11-Aug-2004 BJD Created file - * 25-Aug-2004 BJD Added the _SELECT_* defs for using with functions -*/ - - -#ifndef __ASM_ARCH_REGS_DSC_H -#define __ASM_ARCH_REGS_DSC_H "2440-dsc" - -#ifdef CONFIG_CPU_S3C2440 - -#define S3C2440_DSC0 S3C2410_GPIOREG(0xc0) -#define S3C2440_DSC1 S3C2410_GPIOREG(0xc4) - -#define S3C2440_SELECT_DSC0 (0) -#define S3C2440_SELECT_DSC1 (1<<31) - -#define S3C2440_DSC_GETSHIFT(x) ((x) & 31) - -#define S3C2440_DSC0_ENABLE (1<<31) - -#define S3C2440_DSC0_ADDR (S3C2440_SELECT_DSC0 | 8) -#define S3C2440_DSC0_ADDR_12mA (0<<8) -#define S3C2440_DSC0_ADDR_10mA (1<<8) -#define S3C2440_DSC0_ADDR_8mA (2<<8) -#define S3C2440_DSC0_ADDR_6mA (3<<8) -#define S3C2440_DSC0_ADDR_MASK (3<<8) - -/* D24..D31 */ -#define S3C2440_DSC0_DATA3 (S3C2440_SELECT_DSC0 | 6) -#define S3C2440_DSC0_DATA3_12mA (0<<6) -#define S3C2440_DSC0_DATA3_10mA (1<<6) -#define S3C2440_DSC0_DATA3_8mA (2<<6) -#define S3C2440_DSC0_DATA3_6mA (3<<6) -#define S3C2440_DSC0_DATA3_MASK (3<<6) - -/* D16..D23 */ -#define S3C2440_DSC0_DATA2 (S3C2440_SELECT_DSC0 | 4) -#define S3C2440_DSC0_DATA2_12mA (0<<4) -#define S3C2440_DSC0_DATA2_10mA (1<<4) -#define S3C2440_DSC0_DATA2_8mA (2<<4) -#define S3C2440_DSC0_DATA2_6mA (3<<4) -#define S3C2440_DSC0_DATA2_MASK (3<<4) - -/* D8..D15 */ -#define S3C2440_DSC0_DATA1 (S3C2440_SELECT_DSC0 | 2) -#define S3C2440_DSC0_DATA1_12mA (0<<2) -#define S3C2440_DSC0_DATA1_10mA (1<<2) -#define S3C2440_DSC0_DATA1_8mA (2<<2) -#define S3C2440_DSC0_DATA1_6mA (3<<2) -#define S3C2440_DSC0_DATA1_MASK (3<<2) - -/* D0..D7 */ -#define S3C2440_DSC0_DATA0 (S3C2440_SELECT_DSC0 | 0) -#define S3C2440_DSC0_DATA0_12mA (0<<0) -#define S3C2440_DSC0_DATA0_10mA (1<<0) -#define S3C2440_DSC0_DATA0_8mA (2<<0) -#define S3C2440_DSC0_DATA0_6mA (3<<0) -#define S3C2440_DSC0_DATA0_MASK (3<<0) - -#define S3C2440_DSC1_SCK0 (S3C2440_SELECT_DSC1 | 28) -#define S3C2440_DSC1_SCK0_12mA (0<<28) -#define S3C2440_DSC1_SCK0_10mA (1<<28) -#define S3C2440_DSC1_SCK0_8mA (2<<28) -#define S3C2440_DSC1_SCK0_6mA (3<<28) -#define S3C2440_DSC1_SCK0_MASK (3<<28) - -#define S3C2440_DSC1_SCK1 (S3C2440_SELECT_DSC1 | 26) -#define S3C2440_DSC1_SCK1_12mA (0<<26) -#define S3C2440_DSC1_SCK1_10mA (1<<26) -#define S3C2440_DSC1_SCK1_8mA (2<<26) -#define S3C2440_DSC1_SCK1_6mA (3<<26) -#define S3C2440_DSC1_SCK1_MASK (3<<26) - -#define S3C2440_DSC1_SCKE (S3C2440_SELECT_DSC1 | 24) -#define S3C2440_DSC1_SCKE_10mA (0<<24) -#define S3C2440_DSC1_SCKE_8mA (1<<24) -#define S3C2440_DSC1_SCKE_6mA (2<<24) -#define S3C2440_DSC1_SCKE_4mA (3<<24) -#define S3C2440_DSC1_SCKE_MASK (3<<24) - -/* SDRAM nRAS