--- linux-2.6.22-rc2/include/asm-arm/arch-s3c2410/regs-gpiol.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.6.22-rc2-hsmmc/include/asm-arm/arch-s3c2410/regs-gpiol.h	2007-05-21 09:44:58.000000000 +0100
@@ -0,0 +1,98 @@
+/* linux/include/asm-arm/arch-s3c2410/regs-gpiol.h
+ *
+ * Copyright 2007 Simtec Electronics <linux@simtec.co.uk>
+ *		  http://www.simtec.co.uk/products/SWLINUX/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2443 GPIO L register definitions
+*/
+
+#ifndef __ASM_ARCH_REGS_GPIOLH
+#define __ASM_ARCH_REGS_GPIOL_H "gpiol"
+
+#define S3C2443_GPIO_BANKL	((0xf0 / 0x10) * 32)
+
+#define S3C2443_GPLCON		S3C2410_GPIOREG(0xf0)
+#define S3C2443_GPLDAT		S3C2410_GPIOREG(0xf4)
+#define S3C2443_GPLUP		S3C2410_GPIOREG(0xf8)
+
+#define S3C2443_GPL0		S3C2410_GPIONO(S3C2443_GPIO_BANKL, 0)
+#define S3C2443_GPL0_INP	(0x00 << 0)
+#define S3C2443_GPL0_OUTP	(0x01 << 0)
+#define S3C2443_GPL0_HSMMC_D0	(0x02 << 0)
+
+#define S3C2443_GPL1		S3C2410_GPIONO(S3C2443_GPIO_BANKL, 1)
+#define S3C2443_GPL1_INP	(0x00 << 2)
+#define S3C2443_GPL1_OUTP	(0x01 << 2)
+#define S3C2443_GPL1_HSMMC_D1	(0x02 << 2)
+
+#define S3C2443_GPL2		S3C2410_GPIONO(S3C2443_GPIO_BANKL, 2)
+#define S3C2443_GPL2_INP	(0x00 << 4)
+#define S3C2443_GPL2_OUTP	(0x01 << 4)
+#define S3C2443_GPL2_HSMMC_D2	(0x02 << 4)
+
+#define S3C2443_GPL3		S3C2410_GPIONO(S3C2443_GPIO_BANKL, 3)
+#define S3C2443_GPL3_INP	(0x00 << 6)
+#define S3C2443_GPL3_OUTP	(0x01 << 6)
+#define S3C2443_GPL3_HSMMC_D3	(0x02 << 6)
+
+#define S3C2443_GPL4		S3C2410_GPIONO(S3C2443_GPIO_BANKL, 4)
+#define S3C2443_GPL4_INP	(0x00 << 8)
+#define S3C2443_GPL4_OUTP	(0x01 << 8)
+#define S3C2443_GPL4_HSMMC_D4	(0x02 << 8)
+
+#define S3C2443_GPL5		S3C2410_GPIONO(S3C2443_GPIO_BANKL, 5)
+#define S3C2443_GPL5_INP	(0x00 << 10)
+#define S3C2443_GPL5_OUTP	(0x01 << 10)
+#define S3C2443_GPL5_HSMMC_D5	(0x02 << 10)
+
+#define S3C2443_GPL6		S3C2410_GPIONO(S3C2443_GPIO_BANKL, 6)
+#define S3C2443_GPL6_INP	(0x00 << 12)
+#define S3C2443_GPL6_OUTP	(0x01 << 12)
+#define S3C2443_GPL6_HSMMC_D6	(0x02 << 12)
+
+#define S3C2443_GPL7		S3C2410_GPIONO(S3C2443_GPIO_BANKL, 7)
+#define S3C2443_GPL7_INP	(0x00 << 14)
+#define S3C2443_GPL7_OUTP	(0x01 << 14)
+#define S3C2443_GPL7_HSMMC_D7	(0x02 << 14)
+
+#define S3C2443_GPL8		S3C2410_GPIONO(S3C2443_GPIO_BANKL, 8)
+#define S3C2443_GPL8_INP	(0x00 << 16)
+#define S3C2443_GPL8_OUTP	(0x01 << 16)
+#define S3C2443_GPL8_HSMMC_CMD	(0x02 << 16)
+
+#define S3C2443_GPL9		S3C2410_GPIONO(S3C2443_GPIO_BANKL, 9)
+#define S3C2443_GPL9_INP	(0x00 << 18)
+#define S3C2443_GPL9_OUTP	(0x01 << 18)
+#define S3C2443_GPL9_HSMMC_CLK	(0x02 << 18)
+
+#define S3C2443_GPL10		S3C2410_GPIONO(S3C2443_GPIO_BANKL, 10)
+#define S3C2443_GPL10_INP	(0x00 << 20)
+#define S3C2443_GPL10_OUTP	(0x01 << 20)
+#define S3C2443_GPL10_SPICLK1	(0x02 << 20)
+
+#define S3C2443_GPL11		S3C2410_GPIONO(S3C2443_GPIO_BANKL, 11)
+#define S3C2443_GPL11_INP	(0x00 << 22)
+#define S3C2443_GPL11_OUTP	(0x01 << 22)
+#define S3C2443_GPL11_SPIMOSI1	(0x02 << 22)
+
+#define S3C2443_GPL12		S3C2410_GPIONO(S3C2443_GPIO_BANKL, 12)
+#define S3C2443_GPL12_INP	(0x00 << 24)
+#define S3C2443_GPL12_OUTP	(0x01 << 24)
+#define S3C2443_GPL12_SPIMISO1	(0x02 << 24)
+
+#define S3C2443_GPL13		S3C2410_GPIONO(S3C2443_GPIO_BANKL, 13)
+#define S3C2443_GPL13_INP	(0x00 << 26)
+#define S3C2443_GPL13_OUTP	(0x01 << 26)
+#define S3C2443_GPL13_SS0	(0x02 << 26)
+
+#define S3C2443_GPL14		S3C2410_GPIONO(S3C2443_GPIO_BANKL, 14)
+#define S3C2443_GPL14_INP	(0x00 << 28)
+#define S3C2443_GPL14_OUTP	(0x01 << 28)
+#define S3C2443_GPL14_SS1	(0x02 << 28)
+
+#endif	/* __ASM_ARCH_REGS_GPIOL_H */
+